Chip-level reliability study of barrier engineered (BE) floating gate (FG) Flash memory devices
Hang-Ting Lue, JiFong Pan, Chang, C S, Szu-Yu Wang, Chang, Y F, Lee, Y C, Liaw, M H, Chen, Y J, Chen, K F, Lo, Chester, Huang, I J, Han, T T, Chen, M S, Lu, W P, Yang, T, Chen, K C, Kuang-Yeu Hsieh, Chih-Yuan Lu
Published in 2010 IEEE International Reliability Physics Symposium (01.05.2010)
Published in 2010 IEEE International Reliability Physics Symposium (01.05.2010)
Get full text
Conference Proceeding