A 65nm node strained SOI technology with slim spacer
Fu-Liang Yang, Chien-Chao Huang, Hou-Yu Chen, Jhon-Jhy Liaw, Tang-Xuan Chung, Hung-Wei Chen, Chang-Yun Chang, Cheng Chuan Huang, Kuang-Hsin Chen, Di-Hong Lee, Hsun-Chih Tsao, Cheng-Kuo Wen, Shui-Ming Cheng, Yi-Ming Sheu, Ke-Wei Su, Chi-Chun Chen, Tze-Liang Lee, Shih-Chang Chen, Chih-Jian Chen, Cheng-hung Chang, Jhi-cheng Lu, Weng Chang, Chuan-Ping Hou, Ying-Ho Chen, Kuei-Shun Chen, Ming Lu, Li-Wei Kung, Yu-Jun Chou, Fu-Jye Liang, Jan-Wen You, King-Chang Shu, Bin-Chang Chang, Jaw-Jung Shin, Chun-Kuang Chen, Tsai-Sheng Gau, Bor-Wen Chan, Yi-Chun Huang, Han-Jan Tao, Jyh-Huei Chen, Yung-Shun Chen, Yee-Chia Yeo, Fung, S.K.-H., Diaz, C.H., Wu, C.-M.M., Lin, B.J., Liang, M.-S., Sun, J.Y.-C., Chenming Hu
Published in IEEE International Electron Devices Meeting 2003 (2003)
Published in IEEE International Electron Devices Meeting 2003 (2003)
Get full text
Conference Proceeding