13.2 A 1Tb 4b/Cell 96-Stacked-WL 3D NAND Flash Memory with 30MB/s Program Throughput Using Peripheral Circuit Under Memory Cell Array Technique
Huh, Hwang, Cho, Wanik, Lee, Jinhaeng, Noh, Yujong, Park, Yongsoon, Ok, Sunghwa, Kim, Jongwoo, Cho, Kayoung, Lee, Hyunchul, Kim, Geonu, Park, Kangwoo, Kim, Kwanho, Lee, Heejoo, Chai, Sooyeol, Kwon, Chankeun, Cho, Hanna, Jeong, Chanhui, Yang, Yujin, Goo, Jayoon, Park, Jangwon, Lee, Juhyeong, Kirr, Heonki, Jo, Kangwook, Park, Cheoljoong, Nam, Hyeonsu, Song, Hyunseok, Lee, Sangkyu, Jeong, Woopyo, Ahn, Kun-Ok, Jung, Tae-Sung
Published in 2020 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2020)
Published in 2020 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2020)
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