Taming heterogeneity - the Ptolemy approach
Eker, J., Janneck, J.W., Lee, E.A., Jie Liu, Xiaojun Liu, Ludvig, J., Neuendorffer, S., Sachs, S., Yuhong Xiong
Published in Proceedings of the IEEE (01.01.2003)
Published in Proceedings of the IEEE (01.01.2003)
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Journal Article
Actor-oriented control system design: a responsible framework perspective
Jie Liu, Eker, J., Janneck, J.W., Xiaojun Liu, Lee, E.A.
Published in IEEE transactions on control systems technology (01.03.2004)
Published in IEEE transactions on control systems technology (01.03.2004)
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Journal Article
Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling
Canale, M., Casale-Brunet, S., Bezati, E., Mattavelli, M., Janneck, J. W.
Published in 2014 IEEE Workshop on Signal Processing Systems (SiPS) (01.10.2014)
Published in 2014 IEEE Workshop on Signal Processing Systems (SiPS) (01.10.2014)
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Conference Proceeding
A machine model for dataflow actors and its applications
Janneck, J. W.
Published in 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) (01.11.2011)
Published in 2011 Conference Record of the Forty Fifth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) (01.11.2011)
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Conference Proceeding
Modeling a die bonder with Petri nets: a case study
Janneck, J.W., Naedele, M.
Published in IEEE transactions on semiconductor manufacturing (01.08.1998)
Published in IEEE transactions on semiconductor manufacturing (01.08.1998)
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Journal Article
High-level system synthesis and optimization of dataflow programs for MPSoCs
Bezati, E., Brunet, S. Casale, Mattavelli, M., Janneck, J. W.
Published in 2016 50th Asilomar Conference on Signals, Systems and Computers (01.11.2016)
Published in 2016 50th Asilomar Conference on Signals, Systems and Computers (01.11.2016)
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Conference Proceeding
Systems design space exploration by serial dataflow program execution
Casale-Brunet, S., Mattavelli, M., Alberti, C., Janneck, J. W.
Published in 2013 Asilomar Conference on Signals, Systems and Computers (01.11.2013)
Published in 2013 Asilomar Conference on Signals, Systems and Computers (01.11.2013)
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Conference Proceeding
Toward efficient execution of dataflow actors
Cedersjo, G., Janneck, J. W.
Published in 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) (01.11.2012)
Published in 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) (01.11.2012)
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Conference Proceeding
Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications
Brunet, S. Casale, Bezati, E., Alberti, C., Mattavelli, M., Amaldi, E., Janneck, J. W.
Published in 2013 Asilomar Conference on Signals, Systems and Computers (01.11.2013)
Published in 2013 Asilomar Conference on Signals, Systems and Computers (01.11.2013)
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Conference Proceeding
Partitioning and mapping dynamic dataflow programs
Arslan, M. A., Janneck, J. W., Kuchcinski, K.
Published in 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) (01.11.2012)
Published in 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) (01.11.2012)
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Conference Proceeding
Profiling of Dataflow Programs Using Post Mortem Causation Traces
Brunet, S. C., Mattavelli, M., Janneck, J. W.
Published in 2012 IEEE Workshop on Signal Processing Systems (01.10.2012)
Published in 2012 IEEE Workshop on Signal Processing Systems (01.10.2012)
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Conference Proceeding
Design space exploration and implementation of RVC-CAL applications using the TURNUS framework
Casale-Brunet, S., Bezati, E., Alberti, C., Roquier, G., Mattavelli, M., Janneck, J. W., Boutellier, J.
Published in 2013 Conference on Design and Architectures for Signal and Image Processing (01.10.2013)
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Published in 2013 Conference on Design and Architectures for Signal and Image Processing (01.10.2013)
Conference Proceeding
Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control
Casale-Brunet, S., Bezati, E., Mattavelli, M., Canale, M., Janneck, J. W.
Published in Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing (01.10.2014)
Published in Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing (01.10.2014)
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Conference Proceeding
TURNUS: An open-source design space exploration framework for dynamic stream programs
Casale-Brunet, S., Wiszniewska, M., Bezati, E., Mattavelli, M., Janneck, J. W., Canale, M.
Published in Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing (01.10.2014)
Published in Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing (01.10.2014)
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Conference Proceeding
Partitioning and optimization of high level stream applications for multi clock domain architectures
Brunet, S. Casale, Bezati, E., Alberti, C., Mattavelli, M., Amaldi, E., Janneck, J. W.
Published in 2013 IEEE Workshop on Signal Processing Systems,Taipei, Taiwan,2013-10-16 - 2013-10-18 (01.10.2013)
Published in 2013 IEEE Workshop on Signal Processing Systems,Taipei, Taiwan,2013-10-16 - 2013-10-18 (01.10.2013)
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Conference Proceeding