Posibits, negabits, and their mixed use in efficient realization of arithmetic algorithms
Jaberipur, G, Parhami, B
Published in 2010 15th CSI International Symposium on Computer Architecture and Digital Systems (01.09.2010)
Published in 2010 15th CSI International Symposium on Computer Architecture and Digital Systems (01.09.2010)
Get full text
Conference Proceeding
A modulo 2n+1 multiplier with double-LSB encoding of residues
Jaberipur, G, Alavi, H
Published in 2010 15th CSI International Symposium on Computer Architecture and Digital Systems (01.09.2010)
Published in 2010 15th CSI International Symposium on Computer Architecture and Digital Systems (01.09.2010)
Get full text
Conference Proceeding
Unified Approach to the Design of Modulo-(2^n +/- 1) Adders Based on Signed-LSB Representation of Residues
Jaberipur, G., Parhami, B.
Published in 2009 19th IEEE Symposium on Computer Arithmetic (01.06.2009)
Published in 2009 19th IEEE Symposium on Computer Arithmetic (01.06.2009)
Get full text
Conference Proceeding
Improved modulo-(2n ± 3) multipliers
Ahmadifar, H., Jaberipur, G.
Published in The 17th CSI International Symposium on Computer Architecture & Digital Systems (CADS 2013) (01.10.2013)
Published in The 17th CSI International Symposium on Computer Architecture & Digital Systems (CADS 2013) (01.10.2013)
Get full text
Conference Proceeding