Search Results - "JOUPPI, Norman Paul" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

modificar modelos de aprendizagem de máquina para melhorar a localidade

modificar modelos de aprendizagem de máquina para melhorar a localidade

by DOE HYUN YOON, NISHANT PATIL, NORMAN PAUL JOUPPI
Year of Publication 23.02.2021

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Patent

ADAPTIVE GRANULARITY ROW- BUFFER CACHE

ADAPTIVE GRANULARITY ROW- BUFFER CACHE

by LI SHENG, MURRALIMANOHAR NAVEEN, JOUPPI NORMAN PAUL
Year of Publication 24.12.2015

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Patent

Memory access methods and apparatus

Memory access methods and apparatus

by Davis Alan Lynn, Chatterjee Niladrish, Udipi Aniruddha Nagendran, Muralimanohar Naveen, Balasubramonian Rajeev, Jouppi Norman Paul
Year of Publication 19.12.2017

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Patent

PHOTONIC INTERCONNECTS FOR COMPUTER SYSTEM DEVICES

PHOTONIC INTERCONNECTS FOR COMPUTER SYSTEM DEVICES

by FIORENTINO, Marco, BINKERT, Nathan, Lorenzo, XU, Qianfan, JOUPPI, Norman, Paul, SCHREIBER, Robert, Samuel, BEAUSOLEIL, Raymond G
Year of Publication 05.12.2018

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Patent

NON-VOLATILE MULTI-LEVEL-CELL MEMORY WITH DECOUPLED BITS FOR HIGHER PERFORMANCE AND ENERGY EFFICIENCY

NON-VOLATILE MULTI-LEVEL-CELL MEMORY WITH DECOUPLED BITS FOR HIGHER PERFORMANCE AND ENERGY EFFICIENCY

by MURALIMANOHAR NAVEEN, YOON HAN BIN, JOUPPI NORMAN PAUL
Year of Publication 17.12.2015

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Patent

NON-VOLATILE MULTI-LEVEL-CELL MEMORY WITH DECOUPLED BITS FOR HIGHER PERFORMANCE AND ENERGY EFFICIENCY

NON-VOLATILE MULTI-LEVEL-CELL MEMORY WITH DECOUPLED BITS FOR HIGHER PERFORMANCE AND ENERGY EFFICIENCY

by YOON, HAN BIN, JOUPPI, NORMAN, PAUL, MURALIMANOHAR, NAVEEN
Year of Publication 09.12.2015

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Patent

SHARED SCRATCHPAD MEMORY WITH PARALLEL LOAD-STORE

SHARED SCRATCHPAD MEMORY WITH PARALLEL LOAD-STORE

by HEDLUND, MATTHEW LEEVER, JOUPPI, NORMAN PAUL, NORRIE, THOMAS, PHELPS, ANDREW EVERETT
Year of Publication 01.11.2022

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Patent

INTERFACE METHODS AND APPARATUS FOR MEMORY DEVICES

INTERFACE METHODS AND APPARATUS FOR MEMORY DEVICES

by JOUPPI, NORMAN, PAUL, MURALIMANOHAR, NAVEEN
Year of Publication 04.08.2011

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Patent

Non-volatile multi-level-cell memory with decoupled bits for higher performance and energy efficiency

Non-volatile multi-level-cell memory with decoupled bits for higher performance and energy efficiency

by MURALIMANOHAR NAVEEN, YOON HAN BIN, JOUPPI NORMAN PAUL
Year of Publication 25.11.2015

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Patent

Memory node error correction

Memory node error correction

by Yoon Doe Hyun, Faraboschi Paolo, Barron Dwight L, Li Sheng, Jouppi Norman Paul
Year of Publication 21.11.2017

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Patent

MODIFYING MACHINE LEARNING MODELS TO IMPROVE LOCALITY

MODIFYING MACHINE LEARNING MODELS TO IMPROVE LOCALITY

by YOON DOE HYUN, JOUPPI NORMAN PAUL, PATIL NISHANT
Year of Publication 15.01.2021

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Patent

Vector simplification using shared scratch pad memory

Vector simplification using shared scratch pad memory

by NORRIE THOMAS, PHELPS ANDREW EVERETT, RAJAMANI, GURUSHANKAR, HEDLUND, MATTHEW, LIVER, JOUPPI NORMAN PAUL
Year of Publication 30.09.2022

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Patent

Accessing remote memory on a memory blade

Accessing remote memory on a memory blade

by LIM KEVIN T, MURALIMANOHAR NAVEEN, SCHREIBER ROBERT, JOUPPI NORMAN PAUL
Year of Publication 20.10.2015

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Patent

Shared scratch pad memory with parallel load-store

Shared scratch pad memory with parallel load-store

by HEDLUND, MATTHEW, LIVELL, NORRIE THOMAS, PHELPS ANDREW EVERETT, JOUPPI NORMAN PAUL
Year of Publication 20.09.2022

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Patent

Executing a prefetching policy responsive to entry into an execution phase of an application

Executing a prefetching policy responsive to entry into an execution phase of an application

by COLLARD JEAN-FRANCOIS, JOUPPI NORMAN PAUL
Year of Publication 20.08.2013

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Patent

PARALLELIZED CHECK POINTING USING MATs AND THROUGH SILICON VIAs (TSVs)

PARALLELIZED CHECK POINTING USING MATs AND THROUGH SILICON VIAs (TSVs)

by JOUPPI, NORMAN, PAUL, MURALIMANOHAR, NAVEEN
Year of Publication 19.05.2011

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Patent

CHECKPOINTING IN MASSIVELY PARALLEL PROCESSING

CHECKPOINTING IN MASSIVELY PARALLEL PROCESSING

by MURALIMANOHAR NAVEEN, JOUPPI NORMAN PAUL
Year of Publication 19.05.2011

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Patent

Low latency matrix multiply unit

Low latency matrix multiply unit

by JOUPPI, NORMAN PAUL, PHELPS, ANDREW EVERETT
Year of Publication 01.03.2019

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Patent

HIGH PERFORMANCE PERSISTENT MEMORY

HIGH PERFORMANCE PERSISTENT MEMORY

by YOON DOE HYUN, LI SHENG, JOUPPI NORMAN PAUL
Year of Publication 17.09.2015

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Patent

Selective error correcting code and memory access granularity switching

Selective error correcting code and memory access granularity switching

by DOE HYUN YOON, S LI, NORMAN PAUL JOUPPI
Year of Publication 09.09.2015

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Patent

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