High-precision deformation mapping in finFET transistors with two nanometre spatial resolution by precession electron diffraction
Cooper, David, Bernier, Nicolas, Rouvière, Jean-Luc, Wang, Yun-Yu, Weng, Weihao, Madan, Anita, Mochizuki, Shogo, Jagannathan, Hemanth
Published in Applied physics letters (29.05.2017)
Published in Applied physics letters (29.05.2017)
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Journal Article
Aggressively Scaled Strained-Silicon-on-Insulator Undoped-Body High- \kappa/Metal-Gate nFinFETs for High-Performance Logic Applications
Maitra, K, Khakifirooz, A, Kulkarni, P, Basker, V S, Faltermeier, J, Jagannathan, H, Adhikari, H, Chun-Chen Yeh, Klymko, N R, Saenger, K, Standaert, T, Miller, R J, Doris, B, Paruchuri, V K, McHerron, D, O'Neil, J, Leobundung, E, Huiming Bu
Published in IEEE electron device letters (01.06.2011)
Published in IEEE electron device letters (01.06.2011)
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Journal Article
High-K Gate Dielectric Structures by Atomic Layer Deposition for the 32nm and Beyond Nodes
Clark, Robert D., Consiglio, Steve, Wajda, Cory, Leusink, Gert, Sugawara, Takuya, Nakabayashi, Hajime, Jagannathan, Hemanth, Edge, Lisa F., Jamison, Paul, Paruchuri, Vamsi, Iijima, Ryosuke, Takayanagi, Mariko, Linder, Barry, Bruley, J, Copel, Matt, Narayanan, Vijay
Published in ECS transactions (03.10.2008)
Published in ECS transactions (03.10.2008)
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Journal Article
Halide Passivation of Germanium Nanowires
Jagannathan, Hemanth, Kim, Jungyup, Deal, Michael, Kelly, Michael, Nishi, Yoshio
Published in ECS transactions (20.10.2006)
Published in ECS transactions (20.10.2006)
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Journal Article
High-k metal gate fundamental learning and multi-Vt options for stacked nanosheet gate-all-around transistor
Jingyun Zhang, Ando, Takashi, Chun Wing Yeung, Miaomiao Wang, Ohseong Kwon, Galatage, Rohit, Chao, Robin, Loubet, Nicolas, Bum Ki Moon, Ruqiang Bao, Vega, Reinaldo A., Juntao Li, Chen Zhang, Zuoguang Liu, Myunggil Kang, Xin Miao, Junli Wang, Kanakasabapathy, Sivananda, Basker, Veeraraghavan S., Jagannathan, Hemanth, Yamashita, Tenko
Published in 2017 IEEE International Electron Devices Meeting (IEDM) (01.12.2017)
Published in 2017 IEEE International Electron Devices Meeting (IEDM) (01.12.2017)
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Conference Proceeding
SiO2 Free HfO2 Gate Dielectrics by Physical Vapor Deposition
Jamison, Paul C., Tsunoda, Takaaki, Tuan Anh Vo, Juntao Li, Jagannathan, Hemanth, Shinde, Sanjay R., Paruchuri, Vamsi K., Gall, Daniel
Published in IEEE transactions on electron devices (01.09.2015)
Published in IEEE transactions on electron devices (01.09.2015)
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Journal Article
BEOL Compatible High-Capacitance MIMCAP Structure Using a Novel High k Material
Jamison, Paul C., Massey, John, Ando, Takashi, Cartier, Eduard A., Jagannathan, Hemanth, Chen, P. J., Liu, Eric, Romero, Alex, Naczas, Sebastian, Narayanan, Vijay, Pancharatnam, Shanti, Restle, Phillip, Rubin, Joshua, Loubet, Nicolas J, Choi, Kisik
Published in ECS transactions (24.04.2020)
Published in ECS transactions (24.04.2020)
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Journal Article
Mechanism for Leakage Reduction by La Incorporation in a HfO2/SiO2/Si Gate Stack
MANABE, Kenzo, WATANABE, Koji, JAGANNATHAN, Hemanth, PARUCHURI, Vamsi K
Published in IEEE electron device letters (01.03.2013)
Published in IEEE electron device letters (01.03.2013)
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Journal Article
Mechanism for Leakage Reduction by La Incorporation in a \hbox\hbox\hbox Gate Stack
Manabe, K., Watanabe, K., Jagannathan, H., Paruchuri, V. K.
Published in IEEE electron device letters (01.03.2013)
Published in IEEE electron device letters (01.03.2013)
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Journal Article
Dual beam laser annealing for contact resistance reduction and its impact on VLSI integrated circuit variability
Zuoguang Liu, Gluschenkov, Oleg, Niimi, Hiroaki, Bei Liu, Juntao Li, Demarest, James, Mochizuki, Shogo, Adusumilli, Praneet, Raymond, Mark, Carr, Adra, Shaoyin Chen, Yun Wang, Jagannathan, Hemanth, Yamashita, Tenko
Published in 2017 Symposium on VLSI Technology (01.06.2017)
Published in 2017 Symposium on VLSI Technology (01.06.2017)
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Conference Proceeding
Interface engineering of Si1−xGex gate stacks for high performance dual channel CMOS
ChoongHyun Lee, Southwick, Richard G., Mochizuki, Shogo, Jamison, Paul, Bao, Ruqiang, Pandey, Rajan, Konar, Aniruddha, Ando, Takashi, Narayanan, Vijay, Haran, Bala, Jagannathan, Hemanth
Published in 2017 IEEE 12th International Conference on ASIC (ASICON) (01.10.2017)
Published in 2017 IEEE 12th International Conference on ASIC (ASICON) (01.10.2017)
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Conference Proceeding
(Invited) Laser Annealing in CMOS Manufacturing
Gluschenkov, Oleg, Jagannathan, Hemanth
Published in Meeting abstracts (Electrochemical Society) (13.04.2018)
Published in Meeting abstracts (Electrochemical Society) (13.04.2018)
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Journal Article
Extraction of Effective Oxide Thickness for SOI FINFETs With High- \kappa/Metal Gates Using the Body Effect
Paul, Sujata, Yeh, Frank, Maitra, Kingsuk, Chung-Hsun Lin, Kerber, Andreas, Kulkarni, Pranita, Jagannathan, Hemanth, Basker, Veeraraghavan S, Miller, Robert J, Huiming Bu
Published in IEEE electron device letters (01.07.2010)
Published in IEEE electron device letters (01.07.2010)
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Journal Article
Extraction of Effective Oxide Thickness for SOI FINFETs With High- [Formula Omitted]/Metal Gates Using the Body Effect
Paul, Sujata, Yeh, Frank, Maitra, Kingsuk, Lin, Chung-Hsun, Kerber, Andreas, Kulkarni, Pranita, Jagannathan, Hemanth, Basker, Veeraraghavan S, Miller, Robert J, Bu, Huiming
Published in IEEE electron device letters (01.07.2010)
Published in IEEE electron device letters (01.07.2010)
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Journal Article
Aggressively Scaled Strained-Silicon-on-Insulator Undoped-Body High- [Formula Omitted]/Metal-Gate nFinFETs for High-Performance Logic Applications
Maitra, Kingsuk, Khakifirooz, Ali, Kulkarni, Pranita, Basker, Veeraraghavan S, Faltermeier, Jonathan, Jagannathan, Hemanth, Adhikari, Hemant, Yeh, Chun-Chen, Klymko, Nancy R, Saenger, Katherine, Standaert, Theodorus, Miller, Robert J, Doris, Bruce, Paruchuri, Vamsi K, McHerron, Dale, O'Neil, James, Leobundung, Effendi, Bu, Huiming
Published in IEEE electron device letters (01.06.2011)
Published in IEEE electron device letters (01.06.2011)
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Journal Article