A 256 mW 40 Mbps Full-HD H.264 High-Profile Codec Featuring a Dual-Macroblock Pipeline Architecture in 65 nm CMOS
Iwata, K., Mochizuki, S., Kimura, M., Shibayama, T., Izuhara, F., Ueda, H., Hosogi, K., Nakata, H., Ehama, M., Kengaku, T., Nakazawa, T., Watanabe, H.
Published in IEEE journal of solid-state circuits (01.04.2009)
Published in IEEE journal of solid-state circuits (01.04.2009)
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Conference Proceeding
A 64 mW High Picture Quality H.264/MPEG-4 Video Codec IP for HD Mobile Applications in 90 nm CMOS
Mochizuki, S., Shibayama, T., Hase, M., Izuhara, F., Akie, K., Nobori, M., Imaoka, R., Ueda, H., Ishikawa, K., Watanabe, H.
Published in IEEE journal of solid-state circuits (01.11.2008)
Published in IEEE journal of solid-state circuits (01.11.2008)
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Conference Proceeding
A multi-standards HDTV video decoder for blu-ray disc standard
Minegishi, N., Sato, H., Izuhara, F., Koyama, M., Vetro, A.
Published in IEEE transactions on consumer electronics (01.05.2009)
Published in IEEE transactions on consumer electronics (01.05.2009)
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Journal Article
A 256mW full-HD H.264 high-profile CODEC featuring dual macroblock-pipeline architecture in 65nm CMOS
Iwata, K., Mochizuki, S., Shibayama, T., Izuhara, F., Ueda, H., Hosogi, K., Nakata, H., Ehama, M., Kengaku, T., Nakazawa, T., Watanabe, H.
Published in 2008 IEEE Symposium on VLSI Circuits (01.06.2008)
Published in 2008 IEEE Symposium on VLSI Circuits (01.06.2008)
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Conference Proceeding