A 1-Tb 4-b/cell 4-Plane 162-Layer 3-D Flash Memory With 2.4-Gb/s IO Interface
Yuh, Jong Hak, Li, Yen-Lung Jason, Li, Heguang, Oyama, Yoshihiro, Hsu, Cynthia, Anantula, Pradeep, Jeong, Gwang Yeong Stanley, Amarnath, Anirudh, Darne, Siddhesh, Bhatia, Sneha, Tang, Tianyu, Arya, Aditya, Rastogi, Naman, Ookuma, Naoki, Mizukoshi, Hiroyuki, Yap, Alex, Wang, Demin, Kim, Steve, Wu, Yonggang, Peng, Min, Lu, Jason, Ip, Tommy, Malhotra, Seema, Han, Taekeun, Okumura, Masatoshi, Liu, Jiwen, Sohn, Jeongduk John, Chibvongodze, Hardwell, Balaga, Muralikrishna, Matsuda, Akihiro, Chen, Chen, K. V., Indra, G., V. S. N. K. Chaitanya, Ramachandra, Venky, Kato, Yosuke, Kumar, Ravi J., Wang, Huijuan, Moogat, Farookh, Yoon, In-Soo, Kanda, Kazushige, Shimizu, Takahiro, Shibata, Noboru, Yanagidaira, Kosuke, Kodama, Takuyo, Fukuda, Ryo, Hirashima, Yasuhiro, Abe, Mitsuhiro
Published in IEEE journal of solid-state circuits (01.01.2023)
Published in IEEE journal of solid-state circuits (01.01.2023)
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Journal Article
A 1-Tb 4b/Cell 4-Plane 162-Layer 3D Flash Memory With a 2.4-Gb/s I/O Speed Interface
Yuh, Jong, Li, Jason, Li, Heguang, Oyama, Yoshihiro, Hsu, Cynthia, Anantula, Pradeep, Jeong, Stanley, Amarnath, Anirudh, Darne, Siddhesh, Bhatia, Sneha, Tang, Tianyu, Arya, Aditya, Rastogi, Naman, Ookuma, Naoki, Mizukoshi, Hiroyuki, Yap, Alex, Wang, Demin, Kim, Steve, Wu, Yonggang, Peng, Min, Lu, Jason, Ip, Tommy, Malhotra, Seema, Han, David, Okumura, Masatoshi, Liu, Jiwen, Sohn, John, Chibvongodze, Hardwell, Balaga, Muralikrishna, Matsuda, Aki, Puri, Chakshu, Chen, Chen, V, Indra K, G, Chaitanya, Ramachandra, Venky, Kato, Yosuke, Kumar, Ravi, Wang, Huijuan, Moogat, Farookh, Yoon, In-Soo, Kanda, Kazushige, Shimizu, Takahiro, Shibata, Noboru, Shigeoka, Takashi, Yanagidaira, Kosuke, Kodama, Takuyo, Fukuda, Ryo, Hirashima, Yasuhiro, Abe, Mitsuhiro
Published in 2022 IEEE International Solid- State Circuits Conference (ISSCC) (20.02.2022)
Published in 2022 IEEE International Solid- State Circuits Conference (ISSCC) (20.02.2022)
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Conference Proceeding
A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology
Cernea, R.-A., Long Pham, Moogat, F., Siu Chan, Binh Le, Yan Li, Shouchang Tsao, Tai-Yuan Tseng, Khanh Nguyen, Li, J., Jayson Hu, Jong Hak Yuh, Hsu, C., Fanglin Zhang, Kamei, T., Nasu, H., Kliza, P., Khin Htoo, Lutze, J., Yingda Dong, Higashitani, M., Junnhui Yang, Hung-Szu Lin, Sakhamuri, V., Li, A., Feng Pan, Yadala, S., Taigor, S., Pradhan, K., Lan, J., James Chan, Abe, T., Fukuda, Y., Mukai, H., Kawakami, K., Liang, C., Ip, T., Shu-Fen Chang, Lakshmipathi, J., Huynh, S., Pantelakis, D., Mofidi, M., Quader, K.
Published in IEEE journal of solid-state circuits (01.01.2009)
Published in IEEE journal of solid-state circuits (01.01.2009)
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Journal Article
Conference Proceeding
A 34MB/s-Program-Throughput 16Gb MLC NAND with All-Bitline Architecture in 56nm
Cernea, Raul, Pham, Long, Moogat, Farookh, Chan, Siu, Le, Binh, Li, Yan, Tsao, Shouchang, Tseng, Tai-Yuan, Nguyen, Khanh, Li, Jason, Hu, Jayson, Park, Jong, Hsu, Cynthia, Zhang, Fanglin, Kamei, Teruhiko, Nasu, Hiroaki, Kliza, Phil, Htoo, Khin, Lutze, Jeffrey, Dong, Yingda, Higashitani, Masaaki, Yang, Junhui, Lin, Hung-Szu, Sakhamuri, Vamshi, Li, Alan, Pan, Feng, Yadala, Sridhar, Taigor, Subodh, Pradhan, Kishan, Lan, James, Chan, James, Abe, Takumi, Fukuda, Yasuyuki, Mukai, Hideo, Kawakami, Koichi, Liang, Connie, Ip, Tommy, Chang, Shu-Fen, Lakshmipathi, Jaggi, Huynh, Sharon, Pantelakis, Dimitris, Mofidi, Mehrdad, Quader, Khandker
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
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Conference Proceeding