Minimizing peak power consumption during scan testing: test pattern modification with X filling heuristics
Badereddine, N., Girard, P., Pravossoudovitch, S., Landrault, C., Virazel, A., Wundcrlich, H.-J.
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
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Conference Proceeding
CNTFET basics and simulation
Dang, T., Anghel, L., Leveugle, R.
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
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Conference Proceeding
Universal low/medium speed I/sup 2/C-slave transceiver: a detailed VLSI implementation
Oudjida, A.K., Liacha, A., Benamrouche, D., Goudjil, M., Tiar, R., Ouchabane, A.
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
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Conference Proceeding
Analysis of CNTFET physical compact model
Maneux, C., Goguet, J., Fregonese, S., Zimmer, T., Cazin d'Honincthun, H., Galdin-Retailleau, S.
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
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Conference Proceeding
CNTFET-based logic circuit design
O'Connor, I., Liu, J., Gaffiot, F.
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
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Conference Proceeding
Analysis of timing jitter in inverters induced by power-supply noise
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Conference Proceeding
Hardware/software approache for the FPGA implementation of a fuzzy logic controller
Masmoudi, M.S., Song, I., Karray, F., Masmoudi, M., Derbel, N.
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
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Conference Proceeding
Theoretical and numerical modeling of a CMOS micromachined acoustic sensor
Mezghani, B., Haboura, K., Tounsi, F., Smaoui, S., El-Borgi, S., Choura, S., Masmoudi, M.
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
Published in International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006 (2006)
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Conference Proceeding