Automatic application-specific instruction-set extensions under microarchitectural constraints
Atasu, Kubilay, Pozzi, Laura, Ienne, Paolo
Published in Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) (02.06.2003)
Published in Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) (02.06.2003)
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Conference Proceeding
A robust self-calibrating transmission scheme for on-chip networks
Worm, F., Ienne, P., Thiran, P., De Micheli, G.
Published in IEEE transactions on very large scale integration (VLSI) systems (01.01.2005)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.01.2005)
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Journal Article
ISEGEN: an iterative improvement-based ISE generation technique for fast customization of processors
Biswas, P., Banerjee, S., Dutt, N.D., Pozzi, L., Ienne, P.
Published in IEEE transactions on very large scale integration (VLSI) systems (01.07.2006)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.07.2006)
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Journal Article
Conference Proceeding
Virtual memory window for application-specific reconfigurable coprocessors
Vuletic, M., Pozzi, L., Ienne, P.
Published in IEEE transactions on very large scale integration (VLSI) systems (01.08.2006)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.08.2006)
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Journal Article
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement
Biswas, Partha, Banerjee, Sudarshan, Dutt, Nikil, Pozzi, Laura, Ienne, Paolo
Published in Design, Automation and Test in Europe (07.03.2005)
Published in Design, Automation and Test in Europe (07.03.2005)
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Conference Proceeding
Introduction of local memory elements in instruction set extensions
Biswas, Partha, Choudhary, Vinay, Atasu, Kubilay, Pozzi, Laura, Ienne, Paolo, Dutt, Nikil
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004 (07.06.2004)
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004 (07.06.2004)
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Conference Proceeding
A unified coding framework for delay-insensitivity
Worm, F., Thiran, P., Ienne, P.
Published in 11th IEEE International Symposium on Asynchronous Circuits and Systems (2005)
Published in 11th IEEE International Symposium on Asynchronous Circuits and Systems (2005)
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Conference Proceeding
Self-calibrating networks-on-chip
Worm, F., Thiran, P., de Micheli, G., Ienne, P.
Published in 2005 IEEE International Symposium on Circuits and Systems (ISCAS) (2005)
Published in 2005 IEEE International Symposium on Circuits and Systems (ISCAS) (2005)
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Conference Proceeding
Virtual memory window for application-specific reconfigurable coprocessors
Vuletić, Miljan, Pozzi, Laura, Ienne, Paolo
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004 (07.06.2004)
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004 (07.06.2004)
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Conference Proceeding
Automatic topology-based identification of instruction-set extensions for embedded processors
Pozzi, L., Vuletic, M., Ienne, P.
Published in Design, Automation, and Test in Europe: Proceedings of the conference on Design, automation and test in Europe; 04-08 Mar. 2002 (2002)
Published in Design, Automation, and Test in Europe: Proceedings of the conference on Design, automation and test in Europe; 04-08 Mar. 2002 (2002)
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Conference Proceeding
Variable Latency Speculative Addition: A New Paradigm for Arithmetic Circuit Design
Verma, A.K., Brisk, P., Ienne, P.
Published in 2008 Design, Automation and Test in Europe (01.03.2008)
Published in 2008 Design, Automation and Test in Europe (01.03.2008)
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Conference Proceeding
Improving FPGA Performance for Carry-Save Arithmetic
Parandeh-Afshar, H., Verma, A.K., Brisk, P., Ienne, P.
Published in IEEE transactions on very large scale integration (VLSI) systems (01.04.2010)
Published in IEEE transactions on very large scale integration (VLSI) systems (01.04.2010)
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