A 0.9-V 1T1C SBT-based embedded nonvolatile FeRAM with a reference voltage scheme and multilayer shielded bit-line structure
Yamaoka, K., Iwanari, S., Murakuki, Y., Hirano, H., Sakagami, M., Nakakuma, T., Miki, T., Gohou, Y.
Published in IEEE journal of solid-state circuits (01.01.2005)
Published in IEEE journal of solid-state circuits (01.01.2005)
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Year of Publication 20.09.2007
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Year of Publication 20.09.2007
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SEMICONDUCTOR MEMORY
AGATA, MASASHI, AKAMATSU, HIRONORI, IWANARI, SHUNICHI, SAWADE, AKIHIRO, KIKUKAWA, HIROHITO
Year of Publication 01.06.1998
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Year of Publication 01.06.1998
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