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Exploration of Schedule Space by Random Walk
Chen, Song, Yoshimura, Takeshi, Ge, Liangwei
Published in IPSJ Transactions on System LSI Design Methodology (2009)
Published in IPSJ Transactions on System LSI Design Methodology (2009)
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Low Power VLSI Circuit Design with Fine-Grain Voltage Engineering
Takamiya, Makoto, Sakurai, Takayasu
Published in IPSJ Transactions on System LSI Design Methodology (2009)
Published in IPSJ Transactions on System LSI Design Methodology (2009)
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Structured Placement with Topological Regularity Evaluation
Nakatake, Shigetoshi, Dong, Qing
Published in IPSJ Transactions on System LSI Design Methodology (2009)
Published in IPSJ Transactions on System LSI Design Methodology (2009)
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Binding Refinement for Multiplexer Reduction
Kodama, Sho, Matsunaga, Yusuke
Published in IPSJ Transactions on System LSI Design Methodology (2009)
Published in IPSJ Transactions on System LSI Design Methodology (2009)
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A Synthesis Method of General Floating-Point Arithmetic Units by Aligned Partition
Chen, Song, Ge, Liangwei, Yoshimura, Takeshi, Nakamura, Yuichi
Published in IPSJ Transactions on System LSI Design Methodology (01.01.2008)
Published in IPSJ Transactions on System LSI Design Methodology (01.01.2008)
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Estimation of Delay Test Quality and Its Application to Test Generation
Wen, Xiaoqing, Kajihara, Seiji, Yamamoto, Masahiro, Morishima, Shohei, Aikyo, Takashi, Hatayama, Kazumi, Fukunaga, Masayasu
Published in IPSJ Transactions on System LSI Design Methodology (01.01.2008)
Published in IPSJ Transactions on System LSI Design Methodology (01.01.2008)
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Embedded System Covalidation with RTOS Model and FPGA
Shibata, Seiya, Hara, Yuko, Takada, Hiroaki, Honda, Shinya, Tomiyama, Hiroyuki
Published in IPSJ Transactions on System LSI Design Methodology (01.01.2008)
Published in IPSJ Transactions on System LSI Design Methodology (01.01.2008)
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Journal Article