METHODS FOR ASSESSING SEMICONDUCTOR STRUCTURES
KOMMU, Srikanth, RAPOPORT, Igor, WANG, Gang, LIBBERT, Jeffrey L, PEIDOUS, Igor
Year of Publication 16.08.2018
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Year of Publication 16.08.2018
Patent
METHODS FOR ASSESSING SEMICONDUCTOR STRUCTURES
Wang, Gang, Libbert, Jeffrey L, Rapoport, Igor, Kommu, Srikanth, Peidous, Igor
Year of Publication 16.08.2018
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Year of Publication 16.08.2018
Patent
Experimental study of Si3N4 viscosity for calibration of stress-dependent models of silicon oxidation
LOIKO, K. V, PEIDOUS, I. V, YUE ZU, HO, H.-M
Published in Journal of the Electrochemical Society (01.11.1999)
Published in Journal of the Electrochemical Society (01.11.1999)
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Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
Jones, Andrew Marquis, Libbert, Jeffrey L, Stanton, Leslie George, Dickinson, Michelle Rene, Pratt, Samuel Christopher, Kommu, Srikanth, Mendez, Horacio Josue, Peidous, Igor
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Year of Publication 13.08.2019
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Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
Libbert, Jeffrey L, Stanton, Leslie George, Dickinson, Michelle Rene, Pratt, Samuel Christopher, Kommu, Srikanth, Jones, Andrew M, Mendez, Horacio Josue, Peidous, Igor
Year of Publication 13.08.2019
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Year of Publication 13.08.2019
Patent