A Novel Foundry Yield Model Using Critical Area Analysis
Qi, Xiaoyuan, Schroeder, Uwe, Sinnott, Aaron, Nair, Binod Kumar G., Sultan, Akif, Madhavan, Sriram, Condella, Jac, Fales, Jonathan, Nelson, Jeffrey, Gennari, Frank, Lai, Ya-Chieh, Sengupta, Rwik, Hurat, Philippe
Published in IEEE transactions on semiconductor manufacturing (01.08.2021)
Published in IEEE transactions on semiconductor manufacturing (01.08.2021)
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Journal Article
Electronic design tracing and tamper detection using automatically generated layout patterns
Sengupta, Rwik, Condella, Jac Paul P, Hurat, Philippe, Nelson, Jeffrey
Year of Publication 07.02.2023
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Year of Publication 07.02.2023
Patent
Modeling and Validation of Silicon Contour-Based Extraction and Simulation of Non-Uniform Devices
Devoivre, T., Rouse, R., Verghese, N., Hurat, P.
Published in 2007 IEEE Custom Integrated Circuits Conference (01.09.2007)
Published in 2007 IEEE Custom Integrated Circuits Conference (01.09.2007)
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Conference Proceeding
High Performance Full Chip Device Profiling and DOE selection for Physical and Parametric Yield Monitoring
Lai, Ya-Chieh, Salem, Rami, Pinto, Angelo, Cote, Michel, Xu, Wei, Pathak, Piyush, Hurat, Philippe
Published in 2019 Electron Devices Technology and Manufacturing Conference (EDTM) (01.03.2019)
Published in 2019 Electron Devices Technology and Manufacturing Conference (EDTM) (01.03.2019)
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Conference Proceeding
Pre-Tapeout Design for Yield Application: Design based Diffing, Pattern Analytics and Risk Scoring
Salem, Rami, Vadi, Vic, Pinto, Angelo, Pathak, Piyush, Lai, Ya-Chieh, Gennari, Frank, Hurat, Philippe
Published in 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) (01.03.2018)
Published in 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) (01.03.2018)
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Conference Proceeding
Addressing Parametric Impact of Systematic Pattern Variations in Digital IC Design
Pei-Hua Wang, Lee, B., Han, G., Rouse, R., Hurat, P., Verghese, N.
Published in 2007 IEEE Custom Integrated Circuits Conference (01.09.2007)
Published in 2007 IEEE Custom Integrated Circuits Conference (01.09.2007)
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Conference Proceeding
Practical application of full-feature alternating phase-shifting technology for a phase-aware standard-cell design flow
Sanie, Michael, Côté, Michel, Hurat, Philippe, Malhotra, Vinod
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 38th conference on Design automation (01.01.2001)
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 38th conference on Design automation (01.01.2001)
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Conference Proceeding
Practical application of full-feature alternating phase-shifting technology for a phase-aware standard-cell design flow
Sanie, Michael, Côté, Michel, Hurat, Philippe, Malhotra, Vinod
Published in Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232) (22.06.2001)
Published in Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232) (22.06.2001)
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Conference Proceeding
Silicon tolerance specification using shapes as design intent markers
Cote, Michel, Rieger, Michael, Hurat, Philippe, Lugg, Robert, Mayhew, Jeff
Year of Publication 28.08.2012
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Year of Publication 28.08.2012
Patent
Silicon tolerance specification using shapes as design intent markers
LUGG ROBERT, MAYHEW JEFF, COTE MICHEL, RIEGER MICHAEL, HURAT PHILIPPE
Year of Publication 28.08.2012
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Year of Publication 28.08.2012
Patent
DFM reality in sub-nanometer IC design
Verghese, N., Hurat, P.
Published in 2007 Asia and South Pacific Design Automation Conference (01.01.2007)
Published in 2007 Asia and South Pacific Design Automation Conference (01.01.2007)
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Conference Proceeding
Standard cell printability grading and hot spot detection
Cote, M., Hurat, P.
Published in Sixth international symposium on quality electronic design (isqed'05) (2005)
Published in Sixth international symposium on quality electronic design (isqed'05) (2005)
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Conference Proceeding
Predictive models and CAD methodology for pattern dependent variability
Verghese, N., Rouse, R., Hurat, P.
Published in 2008 Asia and South Pacific Design Automation Conference (01.01.2008)
Published in 2008 Asia and South Pacific Design Automation Conference (01.01.2008)
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Conference Proceeding
Silicon Tolerance Specification Using Shapes As Design Intent Markers
LUGG ROBERT, MAYHEW JEFF, COTE MICHEL, RIEGER MICHAEL, HURAT PHILIPPE
Year of Publication 26.02.2009
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Year of Publication 26.02.2009
Patent
Silicon tolerance specification using shapes as design intent markers
Cote, Michel, Rieger, Michael, Hurat, Philippe, Lugg, Robert, Mayhew, Jeff
Year of Publication 25.11.2008
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Year of Publication 25.11.2008
Patent
Silicon tolerance specification using shapes as design intent markers
LUGG ROBERT, MAYHEW JEFF, COTE MICHEL, RIEGER MICHAEL, HURAT PHILIPPE
Year of Publication 25.11.2008
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Year of Publication 25.11.2008
Patent