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Accelerating Deep Neural Networks with Analog Memory Devices

Accelerating Deep Neural Networks with Analog Memory Devices

by Ambrogio, Stefano, Narayanan, Pritish, Tsai, Hsinyu, Mackin, Charles, Spoon, Katherine, Chen, An, Fasoli, Andrea, Friz, Alexander, Burr, Geoffrey W.
Published in 2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS) (01.08.2020)

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Conference Proceeding

ROW-BY-ROW CONVOLUTIONAL NEURAL NETWORK MAPPING FOR ANALOG ARTIFICIAL INTELLIGENCE NETWORK TRAINING

ROW-BY-ROW CONVOLUTIONAL NEURAL NETWORK MAPPING FOR ANALOG ARTIFICIAL INTELLIGENCE NETWORK TRAINING

by TSAI, HSINYU, BURR, GEOFFREY, NARAYANAN, PRITISH, RASCH, MALTE JOHANNES
Year of Publication 02.12.2021

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Patent

Neuro-Inspired Computing: From Resistive Memory to Optics

Neuro-Inspired Computing: From Resistive Memory to Optics

by Mackin, Charles, Narayanan, Pritish, Tsai, Hsinyu, Ambrogio, Stefano, Chen, An, Burr, Geoffrey W.
Published in 2019 Conference on Lasers and Electro-Optics Europe & European Quantum Electronics Conference (CLEO/Europe-EQEC) (01.06.2019)

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Conference Proceeding

Accelerating Deep Neural Networks with Analog Memory Devices

Accelerating Deep Neural Networks with Analog Memory Devices

by Burr, Geoffrey W., Ambrogio, Stefano, Narayanan, Pritish, Tsai, Hsinyu, Mackin, Charles, Chen, An
Published in 2019 China Semiconductor Technology International Conference (CSTIC) (01.03.2019)

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Conference Proceeding

Enabling High-Performance DNN Inference Accelerators Using Non-Volatile Analog Memory (Invited)

Enabling High-Performance DNN Inference Accelerators Using Non-Volatile Analog Memory (Invited)

by Chen, An, Ambrogio, Stefano, Narayanan, Pritish, Tsai, Hsinyu, Mackin, Charles, Spoon, Katherine, Friz, Alexander, Fasoli, Andrea, Burr, Geoffrey W.
Published in 2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) (01.04.2020)

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Conference Proceeding

LEARNING STATIC BOUND MANAGEMENT PARAMETERS FOR ANALOG RESISTIVE PROCESSING UNIT SYSTEM

LEARNING STATIC BOUND MANAGEMENT PARAMETERS FOR ANALOG RESISTIVE PROCESSING UNIT SYSTEM

by Le Gallo-Bourdeau, Manuel, Chen, An, Sasidharan Rajalekshmi, Nandakumar, Rasch, Malte Johannes, Mackin, Charles, Tsai, HsinYu
Year of Publication 30.03.2023

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Patent

Accelerating Deep Neural Networks with Analog Memory Devices

Accelerating Deep Neural Networks with Analog Memory Devices

by Spoon, Katie, Ambrogio, Stefano, Narayanan, Pritish, Tsai, Hsinyu, Mackin, Charles, Chen, An, Fasoli, Andrea, Friz, Alexander, Burr, Geoffrey W.
Published in 2020 IEEE International Memory Workshop (IMW) (01.05.2020)

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Conference Proceeding

Inference of Deep Neural Networks with Analog Memory Devices

Inference of Deep Neural Networks with Analog Memory Devices

by Ambrogio, Stefano, Narayanan, Pritish, Tsai, Hsinyu, Mackin, Charles, Spoon, Katherine, Chen, An, Fasoli, Andrea, Friz, Alexander, Burr, Geoffrey W.
Published in 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA) (01.08.2020)

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Conference Proceeding

Mitigation of conductance drift in neural network resistive processing units

Mitigation of conductance drift in neural network resistive processing units

by Chuang, Pierce I-Jen, Burr, Geoffrey, Narayanan, Pritish, Tsai, HsinYu, Ambrogio, Stefano
Year of Publication 04.10.2022

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Patent

CLOSED LOOP PROGRAMMING OF PHASE-CHANGE MEMORY

CLOSED LOOP PROGRAMMING OF PHASE-CHANGE MEMORY

by BURR, GEOFFREY, Narayanan, Pritish, Ambrogio, Stefano, Tsai, HsinYu, MACKIN, CHARLES
Year of Publication 26.11.2020

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Patent

(Invited) Analog Memory Fully Connected Networks for Deep Neural Network Accelerated Training

(Invited) Analog Memory Fully Connected Networks for Deep Neural Network Accelerated Training

by Narayanan, Pritish, Ambrogio, Stefano, Tsai, Hsinyu, Shelby, Robert M., Burr, Geoffrey W.
Published in Meeting abstracts (Electrochemical Society) (23.07.2018)

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Journal Article

Biosensor for electrical detection of a nucleotide sequence

Biosensor for electrical detection of a nucleotide sequence

by Bruce, Robert L, Zafar, Sufi, Tsai, HsinYu, Das, Payel
Year of Publication 14.07.2020

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Patent

Chemoepitaxy etch trim using a self aligned hard mask for metal line to via

Chemoepitaxy etch trim using a self aligned hard mask for metal line to via

by Guillorn, Michael A, Tsai, HsinYu, Lin, Chung-Hsun, Brink, Markus
Year of Publication 24.03.2020

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Patent

Directed self-assembly for copper patterning

Directed self-assembly for copper patterning

by Pyzyna, Adam M, Tsai, HsinYu, Joseph, Eric A, Miyazoe, Hiroyuki
Year of Publication 24.03.2020

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Patent

EFFIZIENTE KACHEL-ZUORDNUNG FÜR ZEILENWEISE ZUORDNUNG IN NEURONALEN FALTUNGSNETZEN ZUR ANALOGEN INFERENZ IN KÜNSTLICHE-INTELLIGENZ-NETZEN

EFFIZIENTE KACHEL-ZUORDNUNG FÜR ZEILENWEISE ZUORDNUNG IN NEURONALEN FALTUNGSNETZEN ZUR ANALOGEN INFERENZ IN KÜNSTLICHE-INTELLIGENZ-NETZEN

by Burr, Geoffrey, Narayanan, Pritish, Tsai, Hsinyu
Year of Publication 16.03.2023

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Patent

Efficient tile mapping simulating line-by-line convolutional neural network mapping of artificial intelligence network reasoning

Efficient tile mapping simulating line-by-line convolutional neural network mapping of artificial intelligence network reasoning

by TSAI HSINYU, NARAYANAN PRAKASH, BURR GEOFFREY
Year of Publication 03.02.2023

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Patent

REDUCTION OF SURFACE NUCLEOTIDE HYBRIDIZATION BY OPTIMIZING A BIOSENSOR SENSING SURFACE AREA

REDUCTION OF SURFACE NUCLEOTIDE HYBRIDIZATION BY OPTIMIZING A BIOSENSOR SENSING SURFACE AREA

by Bruce, Robert L, Zafar, Sufi, Tsai, HsinYu, Das, Payel
Year of Publication 17.10.2019

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Patent

AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing

AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing

by Benmeziane, Hadjer, Lammie, Corey, Boybat, Irem, Rasch, Malte, Manuel Le Gallo, Tsai, Hsinyu, Ramachandran Muralidhar, Smail Niar, Hamza, Ouarnoughi, Narayanan, Vijay, Abu, Sebastian, Kaoutar El Maghraoui
Published in arXiv.org (17.05.2023)

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Paper

Implicit vector concatenation within 2D mesh routing

Implicit vector concatenation within 2D mesh routing

by JAIN SAURABH, TSAI HSINYU, NARAYANAN PRAKASH, HOSOKAWA KOHJI, BOUR GEOFFREY
Year of Publication 17.05.2024

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Patent

Placement of carbon nanotube guided by DSA patterning

Placement of carbon nanotube guided by DSA patterning

by Afzali-Ardakani, Ali, Han, Shu-Jen, Tsai, HsinYu, Bangsaruntip, Sarunya
Year of Publication 06.08.2019

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Patent

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