A 1.02-pJ/b 20.83-Gb/s/Wire USR Transceiver Using CNRZ-5 in 16-nm FinFET
Tajalli, Armin, Bastani Parizi, Mani, Carnelli, Dario Albino, Cao, Chen, Gharibdoust, Kiarash, Gorret, Davide, Gupta, Amit, Hall, Christopher, Hassanin, Ahmed, Hofstra, Klaas L., Holden, Brian, Hormati, Ali, Keay, John, Mogentale, Yohann, Perrin, Victor, Phillips, John, Raparthy, Sumathi, Shokrollahi, Amin, Stauffer, David, Simpson, Richard, Stewart, Andrew, Surace, Giuseppe, Talebi Amiri, Omid, Truffa, Emanuele, Tschank, Anton, Ulrich, Roger, Walter, Christoph, Singh, Anant
Published in IEEE journal of solid-state circuits (01.04.2020)
Published in IEEE journal of solid-state circuits (01.04.2020)
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Journal Article
RF Performance of T-DAB Receivers
Schiphorst, R., Potman, J., Hofstra, K.L., Cronie, H.S., Slump, C.H.
Published in IEEE transactions on broadcasting (01.06.2008)
Published in IEEE transactions on broadcasting (01.06.2008)
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Journal Article
Short-Reach and Pin-Efficient Interfaces Using Correlated NRZ
Tajalli, Armin, Parizi, Mani Bastani, Carnelli, Dario Albino, Cao, Chen, Gharibdoust, Kiarash, Gupta, Amit, Hassanin, Ahmed, Hofstra, Klaas, Holden, Brian, Hormati, Ali, Keay, John, Shokrollahi, Amin, Stauffer, David, Simpson, Richard, Stewart, Andrew, Surace, Giuseppe, Amiri, Omid Talebi, Tschank, Anton, Ulrich, Roger, Walter, Christoph, Singh, Anant
Published in 2020 IEEE Custom Integrated Circuits Conference (CICC) (01.03.2020)
Published in 2020 IEEE Custom Integrated Circuits Conference (CICC) (01.03.2020)
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Conference Proceeding
10.1 A pin-efficient 20.83Gb/s/wire 0.94pJ/bit forwarded clock CNRZ-5-coded SerDes up to 12mm for MCM packages in 28nm CMOS
Shokrollahi, Amin, Carnelli, Dario, Fox, John, Hofstra, Klaas, Holden, Brian, Hormati, Ali, Hunt, Peter, Johnston, Margaret, Keay, John, Pesenti, Sergio, Simpson, Richard, Stauffer, David, Stewart, Andrew, Surace, Giuseppe, Tajalli, Armin, Amiri, Omid Talebi, Tschank, Anton, Ulrich, Roger, Walter, Christoph, Licciardello, Fabio, Mogentale, Yohann, Singh, Anant
Published in 2016 IEEE International Solid-State Circuits Conference (ISSCC) (01.01.2016)
Published in 2016 IEEE International Solid-State Circuits Conference (ISSCC) (01.01.2016)
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Conference Proceeding
26.3 A pin- and power-efficient low-latency 8-to-12Gb/s/wire 8b8w-coded SerDes link for high-loss channels in 40nm technology
Singh, Anant, Carnelli, Dario, Falay, Altay, Hofstra, Klaas, Licciardello, Fabio, Salimi, Kia, Santos, Hugo, Shokrollahi, Amin, Ulrich, Roger, Walter, Christoph, Fox, John, Hunt, Peter, Keay, John, Simpson, Richard, Stewart, Andy, Surace, Giuseppe, Cronie, Harm
Published in 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) (01.02.2014)
Published in 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) (01.02.2014)
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Conference Proceeding