13.5 A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology
Siau, Chang, Kim, Kwang-Ho, Lee, Seungpil, Isobe, Katsuaki, Shibata, Noboru, Verma, Kapil, Ariki, Takuya, Li, Jason, Yuh, Jong, Amarnath, Anirudh, Nguyen, Qui, Kwon, Ohwon, Jeong, Stanley, Li, Heguang, Hsu, Hua-Ling, Tseng, Tai-yuan, Choi, Steve, Darne, Siddhesh, Anantula, Pradeep, Yap, Alex, Chibvongodze, Hardwell, Miwa, Hitoshi, Yamashita, Minoru, Watanabe, Mitsuyuki, Hayashi, Koichiro, Kato, Yosuke, Miwa, Toru, Kang, Jang Yong, Okumura, Masatoshi, Ookuma, Naoki, Balaga, Muralikrishna, Ramachandra, Venky, Matsuda, Aki, Kulkani, Swaroop, Rachineni, Raghavendra, Manjunath, Pai K., Takehara, Masahito, Pai, Anil, Rajendra, Srinivas, Hisada, Toshiki, Fukuda, Ryo, Tokiwa, Naoya, Kawaguchi, Kazuaki, Yamaoka, Masashi, Komai, Hiromitsu, Minamoto, Takatoshi, Unno, Masaki, Ozawa, Susumu, Nakamura, Hiroshi, Hishida, Tomoo, Kajitani, Yasuyuki, Lin, Lei
Published in 2019 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2019)
Published in 2019 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2019)
Get full text
Conference Proceeding
NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE
MAEDA TAKASHI, HISHIDA TOMOO, IWATA YOSHIHISA, TANAKA HIROYASU, KIDOH MASARU, KATSUMATA RYOTA, NITAYAMA AKIHIRO, KITO MASARU, AOCHI HIDEAKI, ITAGAKI KIYOTARO
Year of Publication 16.07.2010
Get full text
Year of Publication 16.07.2010
Patent