Fast and Accurate Performance Evaluation for RISC-V using Virtual Prototypes
Herdt, Vladimir, Grose, Daniel, Drechsler, Rolf
Published in 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2020)
Published in 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2020)
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Conference Proceeding
RISC-V based virtual prototype: An extensible and configurable platform for the system-level
Herdt, Vladimir, Große, Daniel, Pieper, Pascal, Drechsler, Rolf
Published in Journal of systems architecture (01.10.2020)
Published in Journal of systems architecture (01.10.2020)
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Journal Article
Towards Quantification and Visualization of the Effects of Concretization During Concolic Testing
Tempel, Soren, Herdt, Vladimir, Drechsler, Rolf
Published in IEEE embedded systems letters (01.12.2022)
Published in IEEE embedded systems letters (01.12.2022)
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Journal Article
Processor Verification using Symbolic Execution: A RISC-V Case-Study
Bruns, Niklas, Herdt, Vladimir, Drechsler, Rolf
Published in 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.04.2023)
Published in 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.04.2023)
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Conference Proceeding
SymEx-VP: An open source virtual prototype for OS-agnostic concolic testing of IoT firmware
Tempel, Sören, Herdt, Vladimir, Drechsler, Rolf
Published in Journal of systems architecture (01.05.2022)
Published in Journal of systems architecture (01.05.2022)
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Journal Article
Specification-Based Symbolic Execution for Stateful Network Protocol Implementations in IoT
Tempel, Soren, Herdt, Vladimir, Drechsler, Rolf
Published in IEEE internet of things journal (01.06.2023)
Published in IEEE internet of things journal (01.06.2023)
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Journal Article
Toward RISC-V CSR Compliance Testing
Bruns, Niklas, Herdt, Vladimir, Grose, Daniel, Drechsler, Rolf
Published in IEEE embedded systems letters (01.12.2021)
Published in IEEE embedded systems letters (01.12.2021)
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Journal Article
Towards Specification and Testing of RISC-V ISA Compliance
Herdt, Vladimir, Grose, Daniel, Drechsler, Rolf
Published in 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2020)
Published in 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2020)
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Conference Proceeding
Dynamic Information Flow Tracking for Embedded Binaries using SystemC-based Virtual Prototypes
Pieper, Pascal, Herdt, Vladimir, Grose, Daniel, Drechsler, Rolf
Published in 2020 57th ACM/IEEE Design Automation Conference (DAC) (01.07.2020)
Published in 2020 57th ACM/IEEE Design Automation Conference (DAC) (01.07.2020)
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Conference Proceeding
Cross-Level Processor Verification via Endless Randomized Instruction Stream Generation with Coverage-guided Aging
Bruns, Niklas, Herdt, Vladimir, Jentzsch, Eyck, Drechsler, Rolf
Published in 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE) (14.03.2022)
Published in 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE) (14.03.2022)
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Conference Proceeding
Towards Reliable Spatial Memory Safety for Embedded Software by Combining Checked C with Concolic Testing
Tempel, Soren, Herdt, Vladimir, Drechsler, Rolf
Published in 2021 58th ACM/IEEE Design Automation Conference (DAC) (05.12.2021)
Published in 2021 58th ACM/IEEE Design Automation Conference (DAC) (05.12.2021)
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Conference Proceeding
Verifying Instruction Set Simulators using Coverage-guided Fuzzing
Herdt, Vladimir, Grose, Daniel, Le, Hoang M., Drechsler, Rolf
Published in 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2019)
Published in 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01.03.2019)
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Conference Proceeding
Adaptive simulation with Virtual Prototypes in an open-source RISC-V evaluation platform
Herdt, Vladimir, Große, Daniel, Tempel, Sören, Drechsler, Rolf
Published in Journal of systems architecture (01.06.2021)
Published in Journal of systems architecture (01.06.2021)
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Journal Article