Quantizer-less proportional path fractional-N digital PLL with a low-power high-gain time amplifier and background multi-point spur calibration
Minuk Heo, Sunghyun Bae, Jayeol Lee, Cheonsu Kim, Minjae Lee
Published in ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference (01.09.2017)
Published in ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference (01.09.2017)
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