Operating the GridPix detector in dark matter search experiments
Schön, R., Alfonsi, M., Hemink, G., Decowski, M.P., van Bakel, N., van der Graaf, H.
Published in Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment (01.08.2013)
Published in Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment (01.08.2013)
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Journal Article
Stress-induced leakage current of tunnel oxide derived from flash memory read-disturb characteristics
Satoh, S., Hemink, G., Hatakeyama, K., Aritome, S.
Published in IEEE transactions on electron devices (01.02.1998)
Published in IEEE transactions on electron devices (01.02.1998)
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Journal Article
Reliability issues of flash memory cells
Aritome, S., Shirota, R., Hemink, G., Endoh, T., Masuoka, F.
Published in Proceedings of the IEEE (01.05.1993)
Published in Proceedings of the IEEE (01.05.1993)
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Journal Article
A compact on-chip ECC for low cost flash memories
Tanzawa, T., Tanaka, T., Takeuchi, K., Shirota, R., Aritome, S., Watanabe, H., Hemink, G., Shimizu, K., Sato, S., Takeuchi, Y., Ohuchi, K.
Published in IEEE journal of solid-state circuits (01.05.1997)
Published in IEEE journal of solid-state circuits (01.05.1997)
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Journal Article
Three bits per cell floating gate NAND flash memory technology for 30nm and beyond
Nitta, H., Kamigaichi, T., Arai, F., Futatsuyama, T., Endo, M., Nishihara, N., Murata, T., Takekida, H., Izumi, T., Uchida, K., Maruyama, T., Kawabata, I., Suyama, Y., Sato, A., Ueno, K., Takeshita, H., Joko, Y., Watanabe, S., Liu, Y., Meguro, H., Kajita, A., Ozawa, Y., Takeuchi, Y., Hara, T., Watanabe, T., Sato, S., Tomiie, H., Kanemaru, Y., Shoji, R., Lai, C.H., Nakamichi, M., Owada, K., Ishigaki, T., Hemink, G., Dutta, D., Dong, Y., Chen, C., Liang, G., Higashitani, M., Lutze, J.
Published in 2009 IEEE International Reliability Physics Symposium (01.01.2009)
Published in 2009 IEEE International Reliability Physics Symposium (01.01.2009)
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Conference Proceeding
A side-wall transfer-transistor cell (SWATT cell) for highly reliable multi-level NAND EEPROMs
Aritome, S., Takeuchi, Y., Sato, S., Watanabe, I., Shimizu, K., Hemink, G., Shirota, R.
Published in IEEE transactions on electron devices (01.01.1997)
Published in IEEE transactions on electron devices (01.01.1997)
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Journal Article
Testability analysis of analog systems
Hemink, G.J., Meijer, B.W., Kerkhoff, H.G.
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.06.1990)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.06.1990)
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Journal Article
VIPMOS-a novel buried injector structure for EPROM applications
Wijburg, R.C., Hemink, G.J., Middelhoek, J., Wallinga, H., Mouthaan, T.J.
Published in IEEE transactions on electron devices (01.01.1991)
Published in IEEE transactions on electron devices (01.01.1991)
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Journal Article
Strongly asymmetric doping profiles at mask edges in high-energy ion implantation
Wijburg, R.C., Hemink, G.J., Middelhoek, J.
Published in IEEE transactions on electron devices (01.01.1990)
Published in IEEE transactions on electron devices (01.01.1990)
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Journal Article
Modeling of VIPMOS hot electron gate currents
Hemink, G.J., Wijburg, R.C.M., Wolbert, P.B.M., Wallinga, H.
Published in ESSDERC '91: 21st European Solid State Device Research Conference (1991)
Published in ESSDERC '91: 21st European Solid State Device Research Conference (1991)
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Journal Article
Conference Proceeding
A 151-mm ^ 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology
Fukuda, K., Watanabe, Y., Makino, E., Kawakami, K., Sato, J., Takagiwa, T., Kanagawa, N., Shiga, H., Tokiwa, N., Shindo, Y., Ogawa, T., Edahiro, T., Iwai, M., Nagao, O., Musha, J., Minamoto, T., Furuta, Y., Yanagidaira, K., Suzuki, Y., Nakamura, D., Hosomura, Y., Tanaka, R., Komai, H., Muramoto, M., Shikata, G., Yuminaka, A., Sakurai, K., Sakai, M., Hong Ding, Watanabe, M., Kato, Y., Miwa, T., Mak, A., Nakamichi, M., Hemink, G., Lee, D., Higashitani, M., Murphy, B., Bo Lei, Matsunaga, Y., Naruke, K., Hara, T.
Published in IEEE journal of solid-state circuits (01.01.2012)
Published in IEEE journal of solid-state circuits (01.01.2012)
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Journal Article
Development of the GridPix detector for dual phase noble gas time projection chambers
Alfonsi, M., van Bakel, N., Decowski, M. P., Hemink, G., van der Graaf, H., Schon, R.
Published in 2011 IEEE Nuclear Science Symposium Conference Record (01.10.2011)
Published in 2011 IEEE Nuclear Science Symposium Conference Record (01.10.2011)
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Conference Proceeding
A novel self-aligned shallow trench isolation cell for 90 nm 4 Gbit NAND flash EEPROMs
Ichige, M., Takeuchi, Y., Sugimae, K., Sato, A., Matsui, M., Kamigaichi, T., Kutsukake, H., Ishibashi, Y., Saito, M., Mori, S., Meguro, H., Miyazaki, S., Miwa, T., Takahashi, S., Iguchi, T., Kawai, N., Tamon, S., Arai, N., Kamata, H., Minami, T., Iizuka, H., Higashitani, M., Pham, T., Hemink, G., Momodomi, M., Shirota, R.
Published in 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407) (2003)
Published in 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407) (2003)
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Conference Proceeding
A 56-nm CMOS 99-mm super(2) 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput
Takeuchi, K, Kameda, Y, Fujimura, S, Otake, H, Hosono, K, Shiga, H, Watanabe, Y, Futatsuyama, T, Shindo, Y, Kojima, M, Iwai, M, Shirakawa, M, Ichige, M, Hatakeyama, K, Tanaka, S, Kamei, T, Fu, J-Y, Cernea, A, Li, Y, Higashitani, M, Hemink, G, Sato, S, Oowada, K, Lee, S-C, Hayashida, N, Wan, J, Lutze, J, Tsao, S, Mofidi, M, Sakurai, K, Tokiwa, N, Waki, H, Nozawa, Y, Kanazawa, K, Ohshima, S
Published in IEEE journal of solid-state circuits (01.01.2007)
Published in IEEE journal of solid-state circuits (01.01.2007)
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Journal Article
A 56-nm CMOS 99-mm2 8-Gb multi-level NAND flash memory with 10-MB/s program throughput
TAKEUCHI, Ken, KAMEDA, Yasushi, IWAI, Makoto, SHIRAKAWA, Masanobu, ICHIGE, Masayuki, HATAKEYAMA, Kazuo, TANAKA, Shinichi, KAMEI, Teruhiko, FU, Jia-Yi, CEMEA, Adi, YAN LI, HIGASHITAM, Masaaki, FUJIMURA, Susumu, HEMINK, Gertjan, SATO, Shinji, OOWADA, Ken, LEE, Shih-Chung, HAYASHIDA, Naoki, JUN WAN, LUTZE, Jeffrey, TSAO, Shouchang, MOFIDI, Mehrdad, SAKURAI, Kiyofumi, OTAKE, Hiroyuki, TOKIWA, Naoya, WAKI, Hiroko, NOZAWA, Yasumitsu, KANAZAWA, Kazuhisa, OHSHIMA, Shigeo, HOSONO, Koji, SHIGA, Hitoshi, WATANABE, Yoshihisa, FUTATSUYAMA, Takuya, SHINDO, Yoshihiko, KOJIMA, Masatsugu
Published in IEEE journal of solid-state circuits (2007)
Published in IEEE journal of solid-state circuits (2007)
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Conference Proceeding
Journal Article
A 56-nm CMOS 99- }^ 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput
Takeuchi, K., Kameda, Y., Fujimura, S., Otake, H., Hosono, K., Shiga, H., Watanabe, Y., Futatsuyama, T., Shindo, Y., Kojima, M., Iwai, M., Shirakawa, M., Ichige, M., Hatakeyama, K., Tanaka, S., Kamei, T., Jia-Yi Fu, Cernea, A., Yan Li, Higashitani, M., Hemink, G., Sato, S., Oowada, K., Shih-Chung Lee, Hayashida, N., Jun Wan, Lutze, J., Shouchang Tsao, Mofidi, M., Sakurai, K., Tokiwa, N., Waki, H., Nozawa, Y., Kanazawa, K., Ohshima, S.
Published in IEEE journal of solid-state circuits (01.01.2007)
Published in IEEE journal of solid-state circuits (01.01.2007)
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Journal Article
A 19nm 112.8mm2 64Gb multi-level flash memory with 400Mb/s/pin 1.8V Toggle Mode interface
Shibata, N., Kanda, K., Hisada, T., Isobe, K., Sato, M., Shimizu, Y., Shimizu, T., Sugimoto, T., Kobayashi, T., Inuzuka, K., Kanagawa, N., Kajitani, Y., Ogawa, T., Nakai, J., Iwasa, K., Kojima, M., Suzuki, T., Suzuki, Y., Sakai, S., Fujimura, T., Utsunomiya, Y., Hashimoto, T., Miakashi, M., Kobayashi, N., Inagaki, M., Matsumoto, Y., Inoue, S., He, D., Honda, Y., Musha, J., Nakagawa, M., Honma, M., Abiko, N., Koyanagi, M., Yoshihara, M., Ino, K., Noguchi, M., Kamei, T., Kato, Y., Zaitsu, S., Nasu, H., Ariki, T., Chibvongodze, H., Watanabe, M., Ding, H., Ookuma, N., Yamashita, R., Liang, G., Hemink, G., Moogat, F., Trinh, C., Higashitani, M., Pham, T., Kanazawa, K.
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
Published in 2012 IEEE International Solid-State Circuits Conference (01.02.2012)
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Conference Proceeding
A compact on-chip ECC for low cost flash memories
Tanzawa, T., Tanaka, T., Takeuchi, K., Shirota, R., Aritome, S., Watanabe, H., Hemink, G., Shimizu, K., Sato, S., Takeuchi, Y., Ohuchi, K.
Published in 1996 Symposium on VLSI Circuits. Digest of Technical Papers (1996)
Published in 1996 Symposium on VLSI Circuits. Digest of Technical Papers (1996)
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Conference Proceeding