POWER-TRUCTOR: An Integrated Tool Flow for Formal Verification and Coverage of Architectural Power Intent
Hazra, Aritra, Mukherjee, Rajdeep, Dasgupta, Pallab, Pal, Ajit, Harer, Kevin M., Banerjee, Ansuman, Mukherjee, Subhankar
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.11.2013)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.11.2013)
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Journal Article
Learning from constraints for formal property checking
In-Ho Moon, Harer, K.
Published in 2009 IEEE International High Level Design Validation and Test Workshop (01.11.2009)
Published in 2009 IEEE International High Level Design Validation and Test Workshop (01.11.2009)
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Conference Proceeding
Formal methods for coverage analysis of architectural power states in power-managed designs
Hazra, A., Dasgupta, P., Banerjee, A., Harer, K.
Published in 17th Asia and South Pacific Design Automation Conference (01.01.2012)
Published in 17th Asia and South Pacific Design Automation Conference (01.01.2012)
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Conference Proceeding
Smart simulation using collaborative formal and simulation engines
Pei-Hsin Ho, Shiple, T., Harer, K., Kukula, J., Damiano, R., Bertacco, V., Taylor, J., Jiang Long
Published in Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design (2000)
Published in Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design (2000)
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Conference Proceeding
Journal Article
Method and Apparatus for Solving Sequential Constraints
Cerny, Eduard, Dsouza, Ashvin Mark, Harer, Kevin Michael, Ho, Pei-Hsin
Year of Publication 18.11.2008
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Year of Publication 18.11.2008
Patent