A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS
Li, Chao-Chieh, Yuan, Min-Shueh, Liao, Chia-Chun, Chang, Chih-Hsien, Lin, Yu-Tso, Tsai, Tsung-Hsien, Huang, Tien-Chien, Liao, Hsien-Yuan, Lu, Chung-Ting, Kuo, Hung-Yi, Ximenes, Augusto Ronchini, Staszewski, Robert Bogdan
Published in IEEE transactions on circuits and systems. I, Regular papers (01.05.2021)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.05.2021)
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Journal Article
A 1 Tbit/s Bandwidth 1024 b PLL/DLL-Less eDRAM PHY Using 0.3 V 0.105 mW/Gbps Low-Swing IO for CoWoS Application
Mu-Shan Lin, Chien-Chun Tsai, Chih-Hsien Chang, Wen-Hung Huang, Ying-Yu Hsu, Shu-Chun Yang, Chin-Ming Fu, Mao-Hsuan Chou, Tien-Chien Huang, Ching-Fang Chen, Tze-Chiang Huang, Adham, Saman, Min-Jer Wang, Shen, William Wu, Mehta, Ashok
Published in IEEE journal of solid-state circuits (01.04.2014)
Published in IEEE journal of solid-state circuits (01.04.2014)
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Journal Article
An extra low-power 1Tbit/s bandwidth PLL/DLL-less eDRAM PHY using 0.3V low-swing IO for 2.5D CoWoS application
Mu-Shan Lin, Chien-Chun Tsai, Chih-Hsien Chang, Wen-Hung Huang, Ying-Yu Hsu, Shu-Chun Yang, Chin-Ming Fu, Mao-Hsuan Chou, Tien-Chien Huang, Ching-Fang Chen, Tze-Chiang Huang, Adham, Saman, Min-Jer Wang, Shen, William Wu, Mehta, Ashok
Published in 2013 Symposium on VLSI Technology (01.06.2013)
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Published in 2013 Symposium on VLSI Technology (01.06.2013)
Conference Proceeding
A resistor-free 4.266 Gbps LPDDR4 I/O in 10 nm FinFET CMOS technology
Lu, Tsung-Che, Hsieh, Ming-Hsuan, Huang, Tien-Chien, Fu, Chin-Ming, Chang, Chih-Hsien, Hsieh, Kenny
Published in 2017 Symposium on VLSI Circuits (01.06.2017)
Published in 2017 Symposium on VLSI Circuits (01.06.2017)
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Conference Proceeding