다이-측 내장형 트레이스 기판(ETS) 층 내의 내장된 금속 트레이스들에 결합된 보충 금속 층을 이용하는 집적 회로(IC) 패키지들, 및 관련된 제조 방법들
KANG KUIWON, BUOT JOAN REY VILLARBA, KIM MICHELLE YEJIN, HUANG CHING LIOU
Year of Publication 28.05.2024
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Year of Publication 28.05.2024
Patent
INTEGRATED CIRCUIT (IC) PACKAGES EMPLOYING SUPPLEMENTAL METAL LAYER COUPLED TO EMBEDDED METAL TRACES IN A DIE-SIDE EMBEDDED TRACE SUBSTRATE (ETS) LAYER, AND RELATED FABRICATION METHODS
KANG, Kuiwon, HUANG, Ching-Liou, KIM, Michelle Yejin, BUOT, Joan Rey Villarba
Year of Publication 28.08.2024
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Year of Publication 28.08.2024
Patent
INTEGRATED CIRCUIT (IC) PACKAGES EMPLOYING SUPPLEMENTAL METAL LAYER COUPLED TO EMBEDDED METAL TRACES IN A DIE-SIDE EMBEDDED TRACE SUBSTRATE (ETS) LAYER, AND RELATED FABRICATION METHODS
KANG, Kuiwon, HUANG, Ching-Liou, KIM, Michelle Yejin, BUOT, Joan Rey Villarba
Year of Publication 27.04.2023
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Year of Publication 27.04.2023
Patent
INTEGRATED CIRCUIT (IC) PACKAGES EMPLOYING SUPPLEMENTAL METAL LAYER COUPLED TO EMBEDDED METAL TRACES IN A DIE-SIDE EMBEDDED TRACE SUBSTRATE (ETS) LAYER, AND RELATED FABRICATION METHODS
Kim, Michelle Yejin, Kang, Kuiwon, Huang, Ching-Liou, Buot, Joan Rey Villarba
Year of Publication 20.04.2023
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Year of Publication 20.04.2023
Patent
Integrated circuit (IC) packages employing supplemental metal layer coupled to embedded metal traces in a die-side embedded trace substrate (ETS) layer, and related fabrication methods
KANG, KUI-WON, BUOT, JOAN REY VILLARBA, KIM, MICHELLE YEJIN, HUANG, CHING-LIOU
Year of Publication 01.06.2023
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Year of Publication 01.06.2023
Patent