Search Results - "HLAING MA PHOO PWINT" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Die thickness effects in RF front-end module stack-die assemblies

Die thickness effects in RF front-end module stack-die assemblies

by Kai Liu, YongTaek Lee, HyunTai Kim, Gwang Kim, Frye, Robert, Pwint, Hlaing Ma Phoo, Ahn, Billy
Published in 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) (01.06.2010)

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Conference Proceeding

Semiconductor device and method of forming EWLB semiconductor package with vertical interconnect structure and cavity region

Semiconductor device and method of forming EWLB semiconductor package with vertical interconnect structure and cavity region

by Lim Lee Sun, Huang Rui, Chow Seng Guan, Bao Xu Sheng, Hlaing Ma Phoo Pwint
Year of Publication 11.04.2017

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Patent

Investigation of integrated passive device with through-silicon via

Investigation of integrated passive device with through-silicon via

by Kai Liu, Frye, R., Hlaing, MaPhooPwint, YongTaek Lee, HyunTai Kim, Gwang Kim, Ahn, Billy
Published in 2012 IEEE 62nd Electronic Components and Technology Conference (01.05.2012)

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Conference Proceeding

Semiconductor device and method of forming patterned repassivation openings between RDL and UBM to reduce adverse effects of electro-migration

Semiconductor device and method of forming patterned repassivation openings between RDL and UBM to reduce adverse effects of electro-migration

by ZUO JIAN, HLAING MA PHOO PWINT, BAO XUSHENG
Year of Publication 19.07.2016

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Patent

Semiconductor device and method of forming RDL under bump for electrical connection to enclosed bump

Semiconductor device and method of forming RDL under bump for electrical connection to enclosed bump

by ZUO JIAN, HLAING MA PHOO PWINT, BAO XUSHENG
Year of Publication 22.09.2015

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Patent

Semiconductor Device and Method of Forming Patterned Repassivation Openings Between RDL and UBM to Reduce Adverse Effects of Electro-Migration

Semiconductor Device and Method of Forming Patterned Repassivation Openings Between RDL and UBM to Reduce Adverse Effects of Electro-Migration

by ZUO JIAN, HLAING MA PHOO PWINT, BAO XUSHENG
Year of Publication 02.04.2015

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Patent

Semiconductor device and method of forming patterned repassivation openings between RDL and UBM to reduce adverse effects of electro-migration

Semiconductor device and method of forming patterned repassivation openings between RDL and UBM to reduce adverse effects of electro-migration

by ZUO JIAN, HLAING MA PHOO PWINT, BAO XUSHENG
Year of Publication 24.02.2015

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Patent

Semiconductor device and method of forming EWLB semiconductor package with vertical interconnect structure and cavity region

Semiconductor device and method of forming EWLB semiconductor package with vertical interconnect structure and cavity region

by HUANG RUI, LIM LEE SUN, HLAING MA PHOO PWINT, BAO XUSHENG, CHOW SENG GUAN
Year of Publication 02.02.2016

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Patent

Semiconductor device and method of forming openings through encapsulant to reduce warpage and stress on semiconductor package

Semiconductor device and method of forming openings through encapsulant to reduce warpage and stress on semiconductor package

by HUANG RUI, LIM LEE SUN, HLAING MA PHOO PWINT, BAO XUSHENG, CHOW SENG GUAN
Year of Publication 27.10.2015

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Patent

Semiconductor Device and Method of Forming Patterned Repassivation Openings Between RDL and UBM to Reduce Adverse Effects of Electro-Migration

Semiconductor Device and Method of Forming Patterned Repassivation Openings Between RDL and UBM to Reduce Adverse Effects of Electro-Migration

by ZUO JIAN, HLAING MA PHOO PWINT, BAO XUSHENG
Year of Publication 06.06.2013

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Patent

Semiconductor Device and Method of Forming RDL Under Bump for Electrical Connection to Enclosed Bump

Semiconductor Device and Method of Forming RDL Under Bump for Electrical Connection to Enclosed Bump

by ZUO JIAN, HLAING MA PHOO PWINT, BAO XUSHENG
Year of Publication 30.05.2013

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Patent

Semiconductor Device and Method of Forming EWLB Semiconductor Package with Vertical Interconnect Structure and Cavity Region

Semiconductor Device and Method of Forming EWLB Semiconductor Package with Vertical Interconnect Structure and Cavity Region

by HUANG RUI, BAO XU SHENG, LIM LEE SUN, HLAING MA PHOO PWINT, CHOW SENG GUAN
Year of Publication 14.04.2016

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Patent

Semiconductor Device and Method of Forming EWLB Semiconductor Package with Vertical Interconnect Structure and Cavity Region

Semiconductor Device and Method of Forming EWLB Semiconductor Package with Vertical Interconnect Structure and Cavity Region

by HUANG RUI, LIM LEE SUN, HLAING MA PHOO PWINT, BAO XUSHENG, CHOW SENG GUAN
Year of Publication 06.12.2012

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Patent

Semiconductor Device and Method of Forming Openings Through Encapsulant to Reduce Warpage and Stress on Semiconductor Package

Semiconductor Device and Method of Forming Openings Through Encapsulant to Reduce Warpage and Stress on Semiconductor Package

by HUANG RUI, LIM LEE SUN, HLAING MA PHOO PWINT, BAO XUSHENG, CHOW SENG GUAN
Year of Publication 07.06.2012

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Patent