Low-ESL (<1 pH @ 8.5 GHz) Multi-Terminal Si Capacitor Embedded in 3D Functional Interposer for Power Delivery Network
Kobinata, Kyosuke, Funaki, Tatsuya, Satake, Yoshiaki, Matsuno, Hitoshi, Hidaka, Seiji, Abe, Shunsuke, Ito, Hiroyuki, Hsiao, Chih-Cheng, Li, Sheng Yi, Kim, Youngsuk, Ohba, Takayuki
Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
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