A 450ps Access-Time SRAM Macro in 45nm SOI Featuring a Two-Stage Sensing-Scheme and Dynamic Power Management
Pilo, Harold, Ramadurai, Vinod, Braceras, Geordie, Gabric, John, Lamphier, Steve, Tan, Yue
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
Published in 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01.02.2008)
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Conference Proceeding
A 64 Mb SRAM in 32 nm High-k Metal-Gate SOI Technology With 0.7 V Operation Enabled by Stability, Write-Ability and Read-Ability Enhancements
Pilo, H., Arsovski, I., Batson, K., Braceras, G., Gabric, J., Houle, R., Lamphier, S., Radens, C., Seferagic, A.
Published in IEEE journal of solid-state circuits (01.01.2012)
Published in IEEE journal of solid-state circuits (01.01.2012)
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Journal Article
Conference Proceeding
Impact of circuit assist methods on margin and performance in 6T SRAM
Mann, Randy W., Wang, Jiajing, Nalam, Satyanand, Khanna, Sudhanshu, Braceras, Geordie, Pilo, Harold, Calhoun, Benton H.
Published in Solid-state electronics (01.11.2010)
Published in Solid-state electronics (01.11.2010)
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Journal Article
An SRAM Design in 65-nm Technology Node Featuring Read and Write-Assist Circuits to Expand Operating Voltage
Pilo, H., Barwin, C., Braceras, G., Browning, C., Lamphier, S., Towler, F.
Published in IEEE journal of solid-state circuits (01.04.2007)
Published in IEEE journal of solid-state circuits (01.04.2007)
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Journal Article
Conference Proceeding
Session 19 overview: High-performance embedded memory
Pilo, Harold, Zhang, Kevin
Published in 2010 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2010)
Published in 2010 IEEE International Solid-State Circuits Conference - (ISSCC) (01.02.2010)
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Conference Proceeding
A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements
Pilo, H, Arsovski, I, Batson, K, Braceras, G, Gabric, J, Houle, R, Lamphier, S, Pavlik, F, Seferagic, A, Liang-Yu Chen, Shang-Bin Ko, Radens, C
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
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Conference Proceeding
A 64Mb SRAM in 22nm SOI technology featuring fine-granularity power gating and low-energy power-supply-partition techniques for 37% leakage reduction
Pilo, H., Adams, C. A., Arsovski, I., Houle, R. M., Lamphier, S. M., Lee, M. M., Pavlik, F. M., Sambatur, S. N., Seferagic, A., Wu, R., Younus, M. I.
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
Published in 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (01.02.2013)
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Conference Proceeding