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Arrays Of Elevationally-Extending Strings Of Memory Cells And Methods Used In Forming Array Of Elevationally-Extending Strings Of Memory Cells

Arrays Of Elevationally-Extending Strings Of Memory Cells And Methods Used In Forming Array Of Elevationally-Extending Strings Of Memory Cells

by HALLER GORDON A, HOPKINS JOHN D, JOHN TOM J, LARSEN CHRISTOPHER, KHANDEKAR ANISH A, SHROTRI KUNAL
Year of Publication 17.03.2020

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Patent

Methods of forming field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells

Methods of forming field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells

by HALLER GORDON A, TANG SANH D, GRISHAM PAUL E
Year of Publication 17.07.2012

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Patent

Methods of forming field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells

Methods of forming field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells

by Grisham, Paul E, Haller, Gordon A, Tang, Sanh D
Year of Publication 17.07.2012

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Patent

SILICIDED RECESSED SILICON

SILICIDED RECESSED SILICON

by HARNISH, JUSTIN, MELDRIM, JOHN, MARK, HALLER, GORDON, A, FIGURA, THOMAS, A, NEJAD, HASAN, IYER, RAVI
Year of Publication 27.06.2014

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Patent

DRAM TRANSISTOR WITH RECESSED GATES AND METHODS OF FABRICATING THE SAME

DRAM TRANSISTOR WITH RECESSED GATES AND METHODS OF FABRICATING THE SAME

by TANG, SANH D, HALLER, GORDON A
Year of Publication 25.06.2009

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Patent

METHODS OF FORMING FIELD EFFECT TRANSISTORS, PLURALITIES OF FIELD EFFECT TRANSISTORS, AND DRAM CIRCUITRY COMPRISING A PLURALITY OF INDIVIDUAL MEMORY CELLS

METHODS OF FORMING FIELD EFFECT TRANSISTORS, PLURALITIES OF FIELD EFFECT TRANSISTORS, AND DRAM CIRCUITRY COMPRISING A PLURALITY OF INDIVIDUAL MEMORY CELLS

by GRISHAM, PAUL, TANG, SANH, D, HALLER, GORDON, A
Year of Publication 29.12.2011

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Patent

DRAM TRANSISTOR WITH RECESSED GATES AND METHODS OF FABRICATING THE SAME

DRAM TRANSISTOR WITH RECESSED GATES AND METHODS OF FABRICATING THE SAME

by TANG, SANH, D, HALLER, GORDON, A
Year of Publication 06.05.2009

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Patent

Memory Arrays and Methods of Fabricating Integrated Structures

Memory Arrays and Methods of Fabricating Integrated Structures

by ZHU HONGBIN, KLEIN RITA J, HALLER GORDON A, TRAN LUAN C, HU YUSHI, HOPKINS JOHN D, MELDRIM JOHN M
Year of Publication 16.06.2016

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Patent

Vertical transistors

Vertical transistors

by Tang, Sanh Dang, Haller, Gordon A
Year of Publication 21.04.2009

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Patent

Vertical transistors

Vertical transistors

by TANG SANH DANG, HALLER GORDON A
Year of Publication 21.04.2009

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Patent

DRAM TRANSISTOR WITH RECESSED GATES AND METHODS OF FABRICATING THE SAME

DRAM TRANSISTOR WITH RECESSED GATES AND METHODS OF FABRICATING THE SAME

by HALLER GORDON A, TANG SANH D
Year of Publication 14.04.2009

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Patent

Memory arrays

Memory arrays

by ZHU HONGBIN, KLEIN RITA J, HALLER GORDON A, TRAN LUAN C, HU YUSHI, HOPKINS JOHN D, MELDRIM JOHN M
Year of Publication 15.03.2016

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Patent

Aluminum oxide landing layer for conductive channels for a three dimensional circuit device

Aluminum oxide landing layer for conductive channels for a three dimensional circuit device

by ZHU, HONGBIN, HALLER, GORDON A, SIMSEK-EGE, FATMA A
Year of Publication 21.07.2017

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Patent

Peripheral Gate Stacks and Recessed Array Gates

Peripheral Gate Stacks and Recessed Array Gates

by HALLER GORDON A, FIGURA THOMAS A
Year of Publication 04.12.2008

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Patent

Methods of Forming Field Effect Transistors, Pluralities of Field Effect Transistors, and DRAM Circuitry Comprising a Plurality of Individual Memory Cells

Methods of Forming Field Effect Transistors, Pluralities of Field Effect Transistors, and DRAM Circuitry Comprising a Plurality of Individual Memory Cells

by HALLER GORDON A, TANG SANH D, GRISHAM PAUL
Year of Publication 14.07.2011

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Patent

SYSTEM FOR PREDICTING PROPERTIES OF STRUCTURES, IMAGER SYSTEM, AND RELATED METHODS

SYSTEM FOR PREDICTING PROPERTIES OF STRUCTURES, IMAGER SYSTEM, AND RELATED METHODS

by LYONSMITH SHAWN D, TAYLOR TED L, HALLER GORDON A, NOEMAUN AHMED N, RAMACHANDRAN PRADEEP, LIU QIANLAN, MCCANDLESS STEVE K, MAJUMDAR AMITAVA
Year of Publication 19.03.2021

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Patent

Methods of making a semiconductor memory device

Methods of making a semiconductor memory device

by Tang, Sanh D, Haller, Gordon A, Doyle, Daniel H
Year of Publication 17.05.2011

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Patent

Methods of making a semiconductor memory device

Methods of making a semiconductor memory device

by HALLER GORDON A, TANG SANH D, DOYLE DANIEL H
Year of Publication 17.05.2011

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Patent

Methods of forming a field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells

Methods of forming a field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells

by HALLER GORDON A, TANG SANH D, GRISHAM PAUL
Year of Publication 10.05.2011

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Patent

Methods of forming a field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells

Methods of forming a field effect transistors, pluralities of field effect transistors, and DRAM circuitry comprising a plurality of individual memory cells

by Grisham, Paul, Haller, Gordon A, Tang, Sanh D
Year of Publication 10.05.2011

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Patent

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