A High-Throughput Network Processor Architecture for Latency-Critical Applications
Roy, Sourav, Kaushik, Arvind, Agrawal, Rajkumar, Gergen, Joseph, Rouwet, Wim, Arends, John
Published in IEEE MICRO (01.01.2020)
Published in IEEE MICRO (01.01.2020)
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Journal Article
Method and system for accelerator thread management
Kaushik, Arvind, Mishra, Sneha, Gergen, Joseph, Roy, Sourav, Owens, Howard Dewey
Year of Publication 02.01.2024
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Year of Publication 02.01.2024
Patent
Latency Critical Operation in Network Processors
Roy, Sourav, Kaushik, Arvind, Agrawal, Rajkumar, Gergen, Joseph, Rouwet, Wim, Arends, John
Published in 2019 IEEE Symposium on High-Performance Interconnects (HOTI) (01.08.2019)
Published in 2019 IEEE Symposium on High-Performance Interconnects (HOTI) (01.08.2019)
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Conference Proceeding
METHOD AND SYSTEM FOR ACCELERATOR THREAD MANAGEMENT
Kaushik, Arvind, Mishra, Sneha, Gergen, Joseph, Roy, Sourav, Owens, Howard Dewey
Year of Publication 21.04.2022
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Year of Publication 21.04.2022
Patent
Method and apparatus for controlling wake events in a data processing system
Eckermann Benjamin C, Holloway David C, Marietta Bryan D, Todd David W, Hunter Craig C, Gergen Joseph P
Year of Publication 20.02.2018
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Year of Publication 20.02.2018
Patent
METHOD AND APPARATUS FOR CONTROLLING WAKE EVENTS IN A DATA PROCESSING SYSTEM
TODD David W, HUNTER Craig C, HOLLOWAY David C, MARIETTA Bryan D, ECKERMANN Benjamin C, GERGEN Joseph P
Year of Publication 24.11.2016
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Year of Publication 24.11.2016
Patent
Phase locked loop device and method thereof
BHAGAVATHEESWARAN GAYATHRI A, GERGEN JOSEPH P, SANCHEZ HECTOR, RAMAN ARVIND
Year of Publication 13.08.2013
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Year of Publication 13.08.2013
Patent
PHASE LOCKED LOOP DEVICE AND METHOD THEREOF
BHAGAVATHEESWARAN GAYATHRI A, GERGEN JOSEPH P, SANCHEZ HECTOR, RAMAN ARVIND
Year of Publication 09.12.2010
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Year of Publication 09.12.2010
Patent