Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies
Chin, Phillip, Zukowski, Charles A., Gristede, George D., Kosonocky, Stephen V.
Published in Integration (Amsterdam) (01.01.2005)
Published in Integration (Amsterdam) (01.01.2005)
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Journal Article
Conference Proceeding
Implementation of a self-resetting CMOS 64-bit parallel adder with enhanced testability
Wei Hwang, Gristede, G., Sanda, P., Wang, S.Y., Heidel, D.F.
Published in IEEE journal of solid-state circuits (01.08.1999)
Published in IEEE journal of solid-state circuits (01.08.1999)
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Journal Article
OPTIMIZING THE LAYOUT OF CIRCUITS BASED ON MULTIPLE DESIGN CONSTRAINTS
FRANCH Robert Louis, ZIEGLER Matthew Mantell, GRISTEDE George Diedrich
Year of Publication 28.12.2017
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Year of Publication 28.12.2017
Patent