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Year of Publication 09.10.2018
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Year of Publication 11.10.2016
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Conductive Lines with Protective Sidewalls
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Year of Publication 14.07.2016
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Buried Etch Stop Layer for Damascene Bit Line Formation
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Year of Publication 05.05.2016
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Double Trench Isolation
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Year of Publication 21.04.2016
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Year of Publication 21.04.2016
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Contact Hole Collimation Using Etch-Resistant Walls
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Year of Publication 04.02.2016
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Year of Publication 04.02.2016
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NAND flash memory integrated circuits and processes with controlled gate height
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Year of Publication 26.01.2016
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Year of Publication 26.01.2016
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NAND Flash Memory Integrated Circuits and Processes with Controlled Gate Height
KOKETSU HIROAKI, FUJIKURA EIICHI, TOYAMA FUMIAKI, OKAZAKI SUSUMU, FUTASE TAKUYA
Year of Publication 31.12.2015
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Year of Publication 31.12.2015
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BARRIER LAYER STACK FOR BIT LINE AIR GAP FORMATION
FUKUO NORITAKA, KAKEGAWA TOMOYASU, FUTASE TAKUYA, TAKAHASHI YUJI, YAMADA KATSUO
Year of Publication 19.11.2015
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Year of Publication 19.11.2015
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