A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiers
Nagaraj, K., Fetterman, H.S., Anidjar, J., Lewis, S.H., Renninger, R.G.
Published in IEEE journal of solid-state circuits (01.03.1997)
Published in IEEE journal of solid-state circuits (01.03.1997)
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Journal Article
A 10-b 20-Msample/s analog-to-digital converter
Lewis, S.H., Fetterman, H.S., Gross, G.F., Ramachandran, R., Viswanathan, T.R.
Published in IEEE journal of solid-state circuits (01.03.1992)
Published in IEEE journal of solid-state circuits (01.03.1992)
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Journal Article
A 14-bit 80-kHz sigma-delta A/D converter: modeling, design and performance evaluation
Norsworthy, S.R., Post, I.G., Fetterman, H.S.
Published in IEEE journal of solid-state circuits (01.04.1989)
Published in IEEE journal of solid-state circuits (01.04.1989)
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Journal Article
A GSM 2+ conversion signal processor for continuous full-duplex EDGE/GPRS applications
Walden, R.W., Khoini-Poorfard, R., Fetterman, H.S., Hearn, T., Jeffery, R.M., Liu, P., Lukoff, A., Mangahas, M., Martin, D.G., Mena, J.G., Webb, A.L.
Published in 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) (2001)
Published in 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) (2001)
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Conference Proceeding
Journal Article
A pipelined 9-stage video-rate analog-to-digital converter
Lewis, S.H., Fetterman, H.S., Gross, G.F., Ramachandran, R., Viswanathan, T.R.
Published in Proceedings of the IEEE 1991 Custom Integrated Circuits Conference (1991)
Published in Proceedings of the IEEE 1991 Custom Integrated Circuits Conference (1991)
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Conference Proceeding
CMOS pipelined ADC employing dither to improve linearity
Fetterman, H.S., Martin, D.G., Rich, D.A.
Published in Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327) (1999)
Published in Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327) (1999)
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Conference Proceeding
An 8-bit 50+ Msamples/s pipelined A/D converter with an area and power efficient architecture
Nagaraj, K., Fetterman, H.S., Shariatdoust, R.S., Anidjar, J., Lewis, S.H., Alsayegh, J., Renninger, R.G.
Published in Proceedings of Custom Integrated Circuits Conference (1996)
Published in Proceedings of Custom Integrated Circuits Conference (1996)
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Conference Proceeding
A high-speed, high-resolution analog front end for digital subscriber line applications
Shariatdoust, R., Lakshmikumar, K., Moon, U., Fetterman, H.S., Sankaran, M., Sherry, L., Kumar, J., Daubert, S.
Published in Proceedings of the IEEE 1995 Custom Integrated Circuits Conference (1995)
Published in Proceedings of the IEEE 1995 Custom Integrated Circuits Conference (1995)
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Conference Proceeding