Tablext: A combined neural network and heuristic based table extractor
Colter, Zach, Fayazi, Morteza, Youbi, Zineb Benameur-El, Kamp, Serafina, Yu, Shuyan, Dreslinski, Ronald
Published in Array (New York) (01.09.2022)
Published in Array (New York) (01.09.2022)
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Journal Article
Applications of Artificial Intelligence on the Modeling and Optimization for Analog and Mixed-Signal Circuits: A Review
Fayazi, Morteza, Colter, Zachary, Afshari, Ehsan, Dreslinski, Ronald
Published in IEEE transactions on circuits and systems. I, Regular papers (01.06.2021)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.06.2021)
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Journal Article
AnGeL: Fully-Automated Analog Circuit Generator Using a Neural Network Assisted Semi-Supervised Learning Approach
Fayazi, Morteza, Taba, Morteza Tavakoli, Afshari, Ehsan, Dreslinski, Ronald
Published in IEEE transactions on circuits and systems. I, Regular papers (01.11.2023)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.11.2023)
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Journal Article
DAP: A 507-GMACs/J 256-Core Domain Adaptive Processor for Wireless Communication and Linear Algebra Kernels in 12-nm FINFET
Chen, Kuan-Yu, Yang, Chi-Sheng, Sun, Yu-Hsiu, Tseng, Chien-Wei, Fayazi, Morteza, He, Xin, Feng, Siying, Yue, Yufan, Mudge, Trevor, Dreslinski, Ronald, Kim, Hun-Seok, Blaauw, David
Published in IEEE journal of solid-state circuits (28.08.2024)
Published in IEEE journal of solid-state circuits (28.08.2024)
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Journal Article
FASCINET: A Fully Automated Single-Board Computer Generator Using Neural Networks
Fayazi, Morteza, Colter, Zachary, Youbi, Zineb Benameur-El, Bagherzadeh, Javad, Ajayi, Tutu, Dreslinski, Ronald
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.12.2022)
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01.12.2022)
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Journal Article
Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory
Kim, Sung, Fayazi, Morteza, Daftardar, Alhad, Chen, Kuan-Yu, Tan, Jielun, Pal, Subhankar, Ajayi, Tutu, Xiong, Yan, Mudge, Trevor, Chakrabarti, Chaitali, Blaauw, David, Dreslinski, Ronald, Kim, Hun-Seok
Published in IEEE journal of solid-state circuits (01.04.2022)
Published in IEEE journal of solid-state circuits (01.04.2022)
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Journal Article
FuNToM: Functional Modeling of RF Circuits Using a Neural Network Assisted Two-Port Analysis Method
Fayazi, Morteza, Taba, Morteza Tavakoli, Tabatabavakili, Amirata, Afshari, Ehsan, Dreslinski, Ronald
Published in 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD) (28.10.2023)
Published in 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD) (28.10.2023)
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Conference Proceeding
A Compact CMOS 363 GHz Autodyne FMCW Radar with 57 GHz Bandwidth for Dental Imaging
Taba, Morteza Tavakoli, Hossein Naghavi, S. M., Fayazi, Morteza, Sadeghi, Ali, Cathelin, Andreia, Afshari, Ehsan
Published in 2023 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2023)
Published in 2023 IEEE Custom Integrated Circuits Conference (CICC) (01.04.2023)
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Conference Proceeding
A 507 GMACs/J 256-Core Domain Adaptive Systolic-Array-Processor for Wireless Communication and Linear-Algebra Kernels in 12nm FINFET
Chen, Kuan-Yu, Yang, Chi-Sheng, Sun, Yu-Hsiu, Tseng, Chien-Wei, Fayazi, Morteza, He, Xin, Feng, Siying, Yue, Yufan, Mudge, Trevor, Dreslinski, Ronald, Kim, Hun-Seok, Blaauw, David
Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
Published in 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (12.06.2022)
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Conference Proceeding
Open Information Extraction: A Review of Baseline Techniques, Approaches, and Applications
Kamp, Serafina, Fayazi, Morteza, Benameur-El, Zineb, Yu, Shuyan, Dreslinski, Ronald
Published in arXiv.org (18.10.2023)
Published in arXiv.org (18.10.2023)
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Paper
Journal Article
FuNToM: Functional Modeling of RF Circuits Using a Neural Network Assisted Two-Port Analysis Method
Fayazi, Morteza, Morteza Tavakoli Taba, Amirata Tabatabavakili, Afshari, Ehsan, Dreslinski, Ronald
Published in arXiv.org (03.08.2023)
Published in arXiv.org (03.08.2023)
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Paper
Journal Article
An Open-source Framework for Autonomous SoC Design with Analog Block Generation
Ajayi, Tutu, Kamineni, Sumanth, Cherivirala, Yaswanth K, Fayazi, Morteza, Kwon, Kyumin, Saligane, Mehdi, Gupta, Shourya, Chen, Chien-Hen, Sylvester, Dennis, Blaauw, David, Dreslinski, Ronald, Calhoun, Benton, Wentzloff, David D.
Published in 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC) (05.10.2020)
Published in 2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC) (05.10.2020)
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Conference Proceeding
Tablext: A Combined Neural Network And Heuristic Based Table Extractor
Colter, Zach, Fayazi, Morteza, Benameur-El, Zineb, Kamp, Serafina, Yu, Shuyan, Dreslinski, Ronald
Published in arXiv.org (22.04.2021)
Published in arXiv.org (22.04.2021)
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Paper
Journal Article
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm
Kim, Sung, Fayazi, Morteza, Daftardar, Alhad, Chen, Kuan-Yu, Tan, Jielun, Pal, Subhankar, Ajayi, Tutu, Xiong, Yan, Mudge, Trevor, Chakrabarti, Chaitali, Blaauw, David, Dreslinski, Ronald, Kim, Hun-Seok
Published in 2021 Symposium on VLSI Circuits (13.06.2021)
Published in 2021 Symposium on VLSI Circuits (13.06.2021)
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Conference Proceeding
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm
Kim, Sung, Fayazi, Morteza, Daftardar, Alhad, Kuan-Yu, Chen, Tan, Jielun, Pal, Subhankar, Ajayi, Tutu, Xiong, Yan, Mudge, Trevor, Chakrabarti, Chaitali, Blaauw, David, Dreslinski, Ronald, Hun-Seok Kim
Published in arXiv.org (01.08.2021)
Published in arXiv.org (01.08.2021)
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Paper
Journal Article
Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation
Ajayi, Tutu, Kamineni, Sumanth, Fayazi, Morteza, Cherivirala, Yaswanth K., Kwon, Kyumin, Gupta, Shourya, Duan, Wenbo, Lee, Jeongsup, Chen, Chien-Hen, Saligane, Mehdi, Sylvester, Dennis, Blaauw, David, Dreslinski Jr, Ronald, Calhoun, Benton, Wentzloff, David D.
Published in VLSI-SoC: Design Trends (2021)
Published in VLSI-SoC: Design Trends (2021)
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Book Chapter