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"FULFORD H. JIM"
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"FULFORD H. JIM"
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ULTRA-DENSE THREE-DIMENSIONAL TRANSISTOR DESIGN
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
,
MUKHOPADHYAY, Partha
Year of Publication
29.06.2023
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202
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METHOD OF MAKING OF PLURALITY OF 3D VERTICAL LOGIC ELEMENTS INTEGRATED WITH 3D MEMORY
by
Fulford
,
H
.
Jim
,
Gardner, Mark I
,
Mukhopadhyay, Partha
Year of Publication
22.06.2023
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203
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3D MEMORY WITH CONDUCTIVE DIELECTRIC CHANNEL INTEGRATED WITH LOGIC ACCESS TRANSISTORS
by
Fulford
,
H
.
Jim
,
Gardner, Mark I
,
Mukhopadhyay, Partha
Year of Publication
22.06.2023
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204
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3D SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
,
MUKHOPADHYAY, Partha
Year of Publication
15.06.2023
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205
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UNIFIED ARCHITECTURAL DESIGN FOR ENHANCED 3D CIRCUIT OPTIONS
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
Year of Publication
07.10.2021
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Method of making 3D source drains with hybrid stacking for optimum 3D logic layout
by
Fulford
,
H
.
Jim
,
Gardner, Mark I
Year of Publication
05.10.2021
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207
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Method of making multiple nano layer transistors to enhance a multiple stack CFET performance
by
Fulford
,
H
.
Jim
,
Gardner, Mark I
Year of Publication
28.09.2021
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208
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COMPACT 3D DESIGN AND CONNECTIONS WITH OPTIMUM 3D TRANSISTOR STACKING
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
,
MUKHOPADHYAY, Partha
Year of Publication
25.05.2023
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209
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3D HIGH DENSITY COMPACT METAL FIRST APPROACH FOR HYBRID TRANSISTOR DESIGNS WITHOUT USING EPITAXIAL GROWTH
by
Fulford
,
H
.
Jim
,
Gardner, Mark I
,
Mukhopadhyay, Partha
Year of Publication
11.05.2023
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210
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HIGH DENSITY ARCHITECTURE DESIGN FOR 3D LOGIC AND 3D MEMORY CIRCUITS
by
Fulford
,
H
.
Jim
,
Gardner, Mark I
Year of Publication
26.08.2021
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HIGH DENSITY ARCHITECTURE DESIGN FOR 3D LOGIC AND 3D MEMORY CIRCUITS
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
Year of Publication
26.08.2021
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Horizontal programmable conducting bridges between conductive lines
by
deVilliers, Anton J
,
Fulford
,
H
.
Jim
,
Gardner, Mark I
Year of Publication
02.05.2023
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213
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3D TRANSISTOR STACKING USING NON-EPITAXIAL COMPOUND SEMICONDUCTOR
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
,
MUKHOPADHYAY, Partha
Year of Publication
27.04.2023
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214
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ARCHITECTURE DESIGN AND PROCESS FOR 3D LOGIC AND 3D MEMORY
by
Fulford
,
H
.
Jim
,
Gardner, Mark I
Year of Publication
12.08.2021
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215
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METHOD OF MAKING A CONTINUOUS CHANNEL BETWEEN 3D CMOS
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
Year of Publication
22.07.2021
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METHOD OF MAKING A CONTINUOUS CHANNEL BETWEEN 3D CMOS
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
Year of Publication
15.07.2021
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METHOD OF MAKING SIX TRANSISTOR SRAM CELL USING CONNECTIONS BETWEEN 3D TRANSISTOR STACKS
by
Fulford
,
H
.
Jim
,
GARDNER, Mark I
Year of Publication
01.07.2021
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METHOD OF MAKING A PLURALITY OF 3D SEMICONDUCTOR DEVICES WITH ENHANCED MOBILITY AND CONDUCTIVITY
by
Fulford
,
H
.
Jim
,
Gardner, Mark I
,
Mukhopadhyay, Partha
Year of Publication
02.03.2023
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3D HIGH DENSITY SELF-ALIGNED NANOSHEET DEVICE FORMATION WITH EFFICIENT LAYOUT AND DESIGN
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
,
MUKHOPADHYAY, Partha
Year of Publication
23.02.2023
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220
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MULTI-DIMENSIONAL METAL FIRST DEVICE LAYOUT AND CIRCUIT DESIGN
by
FULFORD
,
H
.
Jim
,
GARDNER, Mark I
,
MUKHOPADHYAY, Partha
Year of Publication
23.02.2023
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