A cost-efficient high-performance dynamic TCAM with pipelined hierarchical searching and shift redundancy architecture
Noda, H., Inoue, K., Kuroiwa, M., Igaue, F., Yamamoto, K., Mattausch, H.J., Koide, T., Amo, A., Hachisuka, A., Soeda, S., Hayashi, I., Morishita, F., Dosaka, K., Arimoto, K., Fujishima, K., Anami, K., Yoshihara, T.
Published in IEEE journal of solid-state circuits (01.01.2005)
Published in IEEE journal of solid-state circuits (01.01.2005)
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A high-capacitance trench structure (Hi-CAT) for megabit LSI memories
SATOH, S.-I, YONEDA, M, FUJISHIMA, K, YAMAZAKI, T
Published in Japanese Journal of Applied Physics (01.01.1985)
Published in Japanese Journal of Applied Physics (01.01.1985)
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A 312-MHz 16-Mb random-cycle embedded DRAM macro with a power-down data retention mode for mobile applications
Morishita, F., Hayashi, I., Matsuoka, H., Takahashi, K., Shigeta, K., Gyohten, T., Niiro, M., Noda, H., Okamoto, M., Hachisuka, A., Amo, A., Shinkawata, H., Kasaoka, T., Dosaka, K., Arimoto, K., Fujishima, K., Anami, K., Yoshihara, T.
Published in IEEE journal of solid-state circuits (01.01.2005)
Published in IEEE journal of solid-state circuits (01.01.2005)
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Conference Proceeding
A New Multiplex Input Technique for High Density CCD Memory
Fujishima, Kazuyasu, Yamada, Michihiro, Tada, Tetsuo, Takano, Satoshi, Yoneda, Masahiro, Gamou, Yoshimi
Published in Japanese Journal of Applied Physics (01.01.1980)
Published in Japanese Journal of Applied Physics (01.01.1980)
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SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
TSURUTA, TAKAHIRO, NISHIMURA, TADASHI, YAMAGATA, NARIHITO, KIMURA, HIROSHI, ARIMOTO, KAZUTAMI, FUJISHIMA, KAZUYASU
Year of Publication 01.06.1999
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Year of Publication 01.06.1999
Patent
SEMICONDUCTOR MEMORY DEVICE
HIDAKA, HIDETO, TOMISHIMA, SHIGEKI, OOISHI, TSUKASA, ARIMOTO, KAZUTAMI, ASAKURA, MIKIO, FUJISHIMA, KAZUYASU, TSUKUDE, MASAKI
Year of Publication 01.02.1999
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Year of Publication 01.02.1999
Patent
A New Multilevel Storage Structure for High Density CCD Memory
Yamada, Michihiro, Fujishima, Kazuyasu, Nagasawa, Kouichi, Gamou, Yoshimi
Published in Japanese Journal of Applied Physics (01.01.1978)
Published in Japanese Journal of Applied Physics (01.01.1978)
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High-performance embedded SOI DRAM architecture for the low-power supply
Yamauchi, T., Morisita, F., Maeda, S., Arimoto, K., Fujishima, K., Ozaki, H., Yoshihara, T.
Published in IEEE journal of solid-state circuits (01.08.2000)
Published in IEEE journal of solid-state circuits (01.08.2000)
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