Cores, Cache, Content, and Characterization: IBM's Second Generation 14-nm Product, z15
Wolpert, David, Berry, Christopher, Bell, Brian, Jatkowski, Adam, Surprise, Jesse, Isakson, John, Geva, Ofer, Deskin, Brian, Cichanowski, Mark, Hamid, Dina, Cavitt, Chris, Fredeman, Gregory, Kannambadi, Dinesh, Saporito, Anthony, Mishra, Ashutosh, Buyuktosunoglu, Alper, Webel, Tobias, Lobo, Preetham, Bertran, Ramon, Parashurama, Pradeep Bhadravati, Chidambarrao, Dureseti, Bruen, Brandon, Wagstaff, Alan, Lukes, Eric, Carey, Sean, Shi, Hunter, Romain, Michael, Logsdon, Paul, Agarwal, Ishita
Published in IEEE journal of solid-state circuits (01.01.2021)
Published in IEEE journal of solid-state circuits (01.01.2021)
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Journal Article
A 45 nm SOI Embedded DRAM Macro for the POWER™ Processor 32 MByte On-Chip L3 Cache
Barth, John, Nair, Kavita, Cao, Nianzheng, Plass, Don, Nelson, Erik, Hwang, Charlie, Fredeman, Gregory, Sperling, Michael, Mathews, Abraham, Kirihata, Toshiaki, Reohr, William R.
Published in IEEE journal of solid-state circuits (01.01.2011)
Published in IEEE journal of solid-state circuits (01.01.2011)
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Conference Proceeding
A 14 nm 1.1 Mb Embedded DRAM Macro With 1 ns Access
Fredeman, Gregory, Plass, Donald W., Mathews, Abraham, Viraraghavan, Janakiraman, Reyer, Kenneth, Knips, Thomas J., Miller, Thomas, Gerhard, Elizabeth L., Kannambadi, Dinesh, Paone, Chris, Dongho Lee, Rainey, Daniel J., Sperling, Michael, Whalen, Michael, Burns, Steven, Tummuru, Rajesh Reddy, Ho, Herbert, Cestero, Alberto, Arnold, Norbert, Khan, Babar A., Kirihata, Toshiaki, Iyer, Subramanian S.
Published in IEEE journal of solid-state circuits (01.01.2016)
Published in IEEE journal of solid-state circuits (01.01.2016)
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Journal Article
2.7 IBM z15: A 12-Core 5.2GHz Microprocessor
Berry, Christopher, Bell, Brian, Jatkowski, Adam, Surprise, Jesse, Isakson, John, Geva, Ofer, Deskin, Brian, Cichanowski, Mark, Hamid, Dina, Cavitt, Chris, Fredeman, Gregory, Saporito, Anthony, Mishra, Ashutosh, Buyuktosunoglu, Alper, Webel, Tobias, Lobo, Preetham, Parashurama, Pradeep, Bertran, Ramon, Chidambarrao, Dureseti, Wolpert, David, Bruen, Brandon
Published in 2020 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2020)
Published in 2020 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2020)
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Conference Proceeding
A 500 MHz Random Cycle, 1.5 ns Latency, SOI Embedded DRAM Macro Featuring a Three-Transistor Micro Sense Amplifier
Barth, J., Reohr, W.R., Parries, P., Fredeman, G., Golz, J., Schuster, S.E., Matick, R.E., Hunter, H., Tanner, C.C., Harig, J., Kim Hoki, Khan, B.A., Griesemer, J., Havreluk, R.P., Yanagisawa, K., Kirihata, T., Iyer, S.S.
Published in IEEE journal of solid-state circuits (01.01.2008)
Published in IEEE journal of solid-state circuits (01.01.2008)
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Journal Article
Conference Proceeding
4.1 22nm Next-generation IBM System z microprocessor
Warnock, James, Curran, Brian, Badar, John, Fredeman, Gregory, Plass, Donald, Yuen Chan, Carey, Sean, Salem, Gerard, Schroeder, Friedrich, Malgioglio, Frank, Mayer, Guenter, Berry, Christopher, Wood, Michael, Yiu-Hing Chan, Mayo, Mark, Isakson, John, Nagarajan, Charudhattan, Werner, Tobias, Sigal, Leon, Nigaglioni, Ricardo, Cichanowski, Mark, Zitz, Jeffrey, Ziegler, Matthew, Bronson, Tim, Strevig, Gerald, Dreps, Daniel, Puri, Ruchir, Malone, Douglas, Wendel, Dieter, Pak-Kin Mak, Blake, Michael
Published in 2015 IEEE International Solid State Circuits Conference (ISSCC) (01.02.2015)
Published in 2015 IEEE International Solid State Circuits Conference (ISSCC) (01.02.2015)
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Conference Proceeding
Journal Article
A Compact eFUSE Programmable Array Memory for SOI CMOS
Safran, J., Leslie, A., Fredeman, G., Kothandaraman, C., Cestero, A., Xiang Chen, Rajeevakumar, R., Deok-kee Kim, Yan Zun Li, Moy, D., Robson, N., Kirihata, T., Iyer, S.
Published in 2007 IEEE Symposium on VLSI Circuits (01.06.2007)
Published in 2007 IEEE Symposium on VLSI Circuits (01.06.2007)
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Conference Proceeding
17.4 A 14nm 1.1Mb embedded DRAM macro with 1ns access
Fredeman, Gregory, Plass, Donald, Mathews, Abraham, Reyer, Kenneth, Knips, Thomas, Miller, Thomas, Gerhard, Elizabeth, Kannambadi, Dinesh, Paone, Chris, Dongho Lee, Rainey, Daniel, Sperling, Michael, Whalen, Michael, Burns, Steven
Published in 2015 IEEE International Solid State Circuits Conference (ISSCC) (01.02.2015)
Published in 2015 IEEE International Solid State Circuits Conference (ISSCC) (01.02.2015)
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Conference Proceeding
Journal Article
A 1 MB Cache Subsystem Prototype With 1.8 ns Embedded DRAMs in 45 nm SOI CMOS
Klim, P.J., Barth, J., Reohr, W.R., Dick, D., Fredeman, G., Koch, G., Le, H.M., Khargonekar, A., Wilcox, P., Golz, J., Kuang, J.B., Mathews, A., Law, J.C., Luong, T., Ngo, H.C., Freese, R., Hunter, H.C., Nelson, E., Parries, P., Kirihata, T., Iyer, S.S.
Published in IEEE journal of solid-state circuits (01.04.2009)
Published in IEEE journal of solid-state circuits (01.04.2009)
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Journal Article
Conference Proceeding
An 800-MHz embedded DRAM with a concurrent refresh mode
Kirihata, T., Parries, P., Hanson, D.R., Hoki Kim, Golz, J., Fredeman, G., Rajeevakumar, R., Griesemer, J., Robson, N., Cestero, A., Khan, B.A., Geng Wang, Wordeman, M., Iyer, S.S.
Published in IEEE journal of solid-state circuits (01.06.2005)
Published in IEEE journal of solid-state circuits (01.06.2005)
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Journal Article
Cache array macro micro-masking
Miller, Thomas E, Gilda, Glenn David, O'Neill, Arthur, Fredeman, Gregory J
Year of Publication 20.09.2022
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Year of Publication 20.09.2022
Patent
Testing multi-port array in integrated circuits
Hyde, Matthew Steven, Srinivasan, Uma, Knips, Thomas J, Fredeman, Gregory J
Year of Publication 20.07.2021
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Year of Publication 20.07.2021
Patent
FAILING ADDRESS REGISTERS FOR BUILT-IN SELF TESTS
MILLER, THOMAS E, SRINIVASAN, UMA, HYDE, MATTHEW STEVEN, KNIPS, THOMAS J, FREDEMAN, GREGORY J
Year of Publication 01.04.2021
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Year of Publication 01.04.2021
Patent
BIT-LINE MUX DRIVER WITH DIODE HEADER FOR COMPUTER MEMORY
Miller, Thomas E, Plass, Donald W, Reyer, Kenneth J, Fredeman, Gregory J, Kannambadi, Dinesh
Year of Publication 01.04.2021
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Year of Publication 01.04.2021
Patent
CACHE ARRAY MACRO MICRO-MASKING
Miller, Thomas E, Gilda, Glenn David, O'Neill, Arthur, FREDEMAN, Gregory J
Year of Publication 11.03.2021
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Year of Publication 11.03.2021
Patent
Bit-line mux driver with diode header for computer memory
Miller, Thomas E, Plass, Donald W, Reyer, Kenneth J, Fredeman, Gregory J, Kannambadi, Dinesh
Year of Publication 09.03.2021
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Year of Publication 09.03.2021
Patent
COLUMN REDUNDANCY SYSTEM AND METHOD FOR MICRO-CELL EMBEDDED DRAM ARCHITECTURE
PONTIUS DALE E, HSU LOUIS LU CHEN, FREDEMAN GREGORY, KIRIHATA TOSHIAKI K, HWANG CHORNG LII
Year of Publication 04.03.2004
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Year of Publication 04.03.2004
Patent