Implementation of a cycle by cycle variable speed processor
Epassa, H.G., Boyer, F.R., Savaria, Y.
Published in 2005 IEEE International Symposium on Circuits and Systems (ISCAS) (2005)
Published in 2005 IEEE International Symposium on Circuits and Systems (ISCAS) (2005)
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Conference Proceeding
A variable period clock synthesis (VPCS) architecture for next-generation power-aware SoC applications
Boyer, F.-R., Epassa, H.G., Pontikakis, B., Savaria, Y., Wei Ling
Published in The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004 (2004)
Published in The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004 (2004)
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Conference Proceeding