Logic operation-based Design for Testability method and parallel test algorithm for 1T1R crossbar
Liu, Peng, You, Zhiqiang, Kuang, Jishun, Elimu, Michael, Cai, Shuo, Wang, Weizheng
Published in Electronics letters (07.12.2017)
Published in Electronics letters (07.12.2017)
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Journal Article
Defect Analysis and Parallel Testing for 3D Hybrid CMOS-Memristor Memory
Liu, Peng, You, Zhiqiang, Wu, Jigang, Elimu, Michael, Wang, Weizheng, Cai, Shuo, Han, Yinhe
Published in IEEE transactions on emerging topics in computing (01.04.2021)
Published in IEEE transactions on emerging topics in computing (01.04.2021)
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Journal Article
Defect Analysis and Parallel March Test Algorithm for 3D Hybrid CMOS-Memristor Memory
Liu, Peng, Wu, Jigang, You, Zhiqiang, Elimu, Michael, Wang, Weizheng, Cai, Shuo
Published in 2018 IEEE 27th Asian Test Symposium (ATS) (01.10.2018)
Published in 2018 IEEE 27th Asian Test Symposium (ATS) (01.10.2018)
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