Search Results - "Dusanapudi Manoj" :: K.UTB vyhledávací portál

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Efficient validation of coherency between processor cores and accelerators in computer systems

by Dusanapudi Manoj, Kamaraju Sairam, Kapoor Shakti
Year of Publication 22.11.2016

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Performance measurement of hardware accelerators

by Krishna Anil, Dusanapudi Manoj, Kamaraju Sairam
Year of Publication 23.08.2016

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Testing a non-core MMU

by Dusanapudi, Manoj, Lecocq, Paul F, Kapoor, Shakti, Schumann, John A
Year of Publication 26.06.2018

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Testing a non-core MMU

by Schumann John A, Lecocq Paul F, Dusanapudi Manoj, Kapoor Shakti
Year of Publication 20.03.2018

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TESTING A NON-CORE MMU

by DUSANAPUDI Manoj, KAPOOR Shakti, LECOCQ Paul F, SCHUMANN John A
Year of Publication 06.07.2017

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TESTING A NON-CORE MMU

by Dusanapudi Manoj, KAPOOR Shakti, LECOCQ Paul F, SCHUMANN John A
Year of Publication 06.07.2017

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PERFORMANCE MEASUREMENT OF HARDWARE ACCELERATORS

by DUSANAPUDI, MANOJ, KAMARAJU, SAIRAM, KRISHNA, ANIL
Year of Publication 16.04.2015

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PERFORMANCE MEASUREMENT OF HARDWARE ACCELERATORS

by DUSANAPUDI MANOJ, KAMARAJU SAIRAM, KRISHNA ANIL
Year of Publication 16.04.2015

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EFFIZIENTES TESTEN EINER DIREKTSPEICHER-ADRESSUMSETZUNG

by Dusanapudi, Manoj, Kapoor, Shakti, Wu, Nelson
Year of Publication 23.04.2020

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EFFICIENT VALIDATION OF COHERENCY BETWEEN PROCESSOR CORES AND ACCELERATORS IN COMPUTER SYSTEMS

by DUSANAPUDI MANOJ, KAMARAJU SAIRAM, KAPOOR SHAKTI
Year of Publication 21.08.2014

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EFFICIENT VALIDATION OF COHERENCY BETWEEN PROCESSOR CORES AND ACCELERATORS IN COMPUTER SYSTEMS

by DUSANAPUDI MANOJ, KAMARAJU SAIRAM, KAPOOR SHAKTI
Year of Publication 21.08.2014

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Memory data management

by LINGAMBUDI ANIL B, DUSANAPUDI MANOJ, JAYARAMAN PRASANNA, DELL TIMOTHY J
Year of Publication 26.05.2015

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Implementing DRAM failure scenarios mitigation by using buffer techniques delaying usage of RAS features in computer systems

by LINGAMBUDI ANIL B, DUSANAPUDI MANOJ, JAYARAMAN PRASANNA, DELL TIMOTHY J
Year of Publication 21.04.2015

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Efficient testing of direct memory address translation

by WU NELSON, DUSANAPUDI MANOJ, KAPOOR SHAKTI
Year of Publication 31.03.2020

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MEMORY DATA MANAGEMENT

by LINGAMBUDI ANIL B, DUSANAPUDI MANOJ, JAYARAMAN PRASANNA, DELL TIMOTHY J
Year of Publication 04.12.2014

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IMPLEMENTING DRAM FAILURE SCENARIOS MITIGATION BY USING BUFFER TECHNIQUES DELAYING USAGE OF RAS FEATURES IN COMPUTER SYSTEMS

by LINGAMBUDI ANIL B, DUSANAPUDI MANOJ, JAYARAMAN PRASANNA, DELL TIMOTHY J
Year of Publication 05.06.2014

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Detecting missing write to cache/memory operations

by MALLIKARJUNAN VARUN, PANDA SUBRAT K, DUSANAPUDI MANOJ, KAMARAJU SAIRAM, BUDHABHATTI BHAVESH D
Year of Publication 15.03.2016

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Using a buffer to replace failed memory cells in a memory component

by SETHURAMAN SARAVANAN, VIDYAPOORNACHARY DIYANESH B, PAULRAJ GIRISANKAR, LINGAMBUDI ANIL B, DUSANAPUDI MANOJ, JAYARAMAN PRASANNA
Year of Publication 08.09.2015

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DETECTING MISSING WRITE TO CACHE/MEMORY OPERATIONS

by MALLIKARJUNAN VARUN, PANDA SUBRAT K, DUSANAPUDI MANOJ, KAMARAJU SAIRAM, BUDHABHATTI BHAVESH D
Year of Publication 18.06.2015

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Performance measurement of hardware accelerators

by DUSANAPUDI MANOJ, KAMARAJU SAIRAM, KRISHNA ANIL
Year of Publication 11.05.2016

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