A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation
Rangel-Patino, Francisco Elias, Viveros-Wacher, Andres, Rayas-Sanchez, Jose Ernesto, Duron-Rosales, Ismael, Vega-Ochoa, Edgar Andrei, Hakim, Nagib, Lopez-Miralrio, Enrique
Published in IEEE transactions on emerging topics in computing (01.04.2020)
Published in IEEE transactions on emerging topics in computing (01.04.2020)
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Journal Article
A holistic methodology for system margining and jitter tolerance optimization in post-silicon validation
Rangel-Patino, Francisco E., Viveros-Wacher, Andres, Rayas-Sanchez, Jose E., Vega-Ochoa, Edgar A., Duron-Rosales, Ismael, Hakim, Nagib
Published in 2016 IEEE MTT-S Latin America Microwave Conference (LAMC) (01.12.2016)
Published in 2016 IEEE MTT-S Latin America Microwave Conference (LAMC) (01.12.2016)
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Conference Proceeding
Reconfigurable FIR filter coefficient optimization in post-silicon validation to improve eye diagram for optical interconnects
Duron-Rosales, Ismael, Rangel-Patino, Francisco E., Rayas-Sanchez, Jose E., Chavez-Hurtado, Jose L., Hakim, Nagib
Published in 2017 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS) (01.06.2017)
Published in 2017 International Caribbean Conference on Devices, Circuits and Systems (ICCDCS) (01.06.2017)
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Conference Proceeding