Search Results - "Drop Michael" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

메모리 제어기와 메모리 사이의 리프레시 타이머 동기화

메모리 제어기와 메모리 사이의 리프레시 타이머 동기화

by JOSE EDWIN, DROP MICHAEL
Year of Publication 11.06.2018

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Patent

METHOD AND APPARATUS FOR DRAM SPATIAL COALESCING WITHIN A SINGLE CHANNEL

METHOD AND APPARATUS FOR DRAM SPATIAL COALESCING WITHIN A SINGLE CHANNEL

by LO HAW JING, DROP MICHAEL, CHUN DEXTER TAMIO
Year of Publication 05.09.2016

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Patent

HYBRID SINGLE AND DUAL-CHANNEL DDR INTERFACE SCHEME BY INTERLEAVING ADDRESS/CONTROL SIGNALS DURING DUAL-CHANNEL OPERATION

HYBRID SINGLE AND DUAL-CHANNEL DDR INTERFACE SCHEME BY INTERLEAVING ADDRESS/CONTROL SIGNALS DURING DUAL-CHANNEL OPERATION

by DROP MICHAEL, MAO JIAN, SANKURATRI RAGHU
Year of Publication 12.06.2012

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Patent

LOW LATENCY SYNCHRONIZATION SCHEME FOR MESOCHRONOUS DDR SYSTEM

LOW LATENCY SYNCHRONIZATION SCHEME FOR MESOCHRONOUS DDR SYSTEM

by PEDRALI NOY MARZIO, SRIRAMAGIRI DEEPTI, JOSE EDWIN, DROP MICHAEL, SANKURATRI RAGHU, HUANG XUHAO
Year of Publication 12.04.2016

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Patent

SYSTEM AND METHOD OF MONITORING CENTRAL PROCESSING UNIT IN REAL TIME

SYSTEM AND METHOD OF MONITORING CENTRAL PROCESSING UNIT IN REAL TIME

by LO HAW-JING, VINODH R CUPPU, KHAN MOINUL H, STEVEN S THOMSON, DROP MICHAEL J, XUE TAO, ALI IRANLI, CHRISTOPHER KONG YEE CHUN
Year of Publication 02.07.2015

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Patent

REFRESH TIMER SYNCHRONIZATION BETWEEN MEMORY CONTROLLER AND MEMORY

REFRESH TIMER SYNCHRONIZATION BETWEEN MEMORY CONTROLLER AND MEMORY

by JOSE, Edwin, DROP, Michael
Year of Publication 26.06.2019

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Patent

REFRESH TIMER SYNCHRONIZATION BETWEEN MEMORY CONTROLLER AND MEMORY

REFRESH TIMER SYNCHRONIZATION BETWEEN MEMORY CONTROLLER AND MEMORY

by JOSE, Edwin, DROP, Michael
Year of Publication 08.08.2018

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Patent

SINCRONIZAÇÃO DE TEMPORIZADOR DE ATUALIZAÇÃO DE ENTRE CONTROLADOR DE MEMÓRIA E MEMÓRIA

SINCRONIZAÇÃO DE TEMPORIZADOR DE ATUALIZAÇÃO DE ENTRE CONTROLADOR DE MEMÓRIA E MEMÓRIA

by MICHAEL DROP, EDWIN JOSE
Year of Publication 14.03.2023

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Patent

Refresh timer synchronization between memory controller and memory

Refresh timer synchronization between memory controller and memory

by Jose Edwin, Drop Michael
Year of Publication 23.01.2018

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Patent

SYSTEM AND METHOD OF MONITORING A CENTRAL PROCESSING UNIT IN REAL TIME

SYSTEM AND METHOD OF MONITORING A CENTRAL PROCESSING UNIT IN REAL TIME

by THOMSON STEVEN S, LO HAW JING, IRANLI ALI, CHUN CHRISTOPHER KONG YEE, KHAN MOINUL H, DROP MICHAEL J, CUPPU VINODH R, XUE TAO
Year of Publication 24.09.2012

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Patent

REFRESH TIMER SYNCHRONIZATION BETWEEN MEMORY CONTROLLER AND MEMORY

REFRESH TIMER SYNCHRONIZATION BETWEEN MEMORY CONTROLLER AND MEMORY

by JOSE, Edwin, DROP, Michael
Year of Publication 06.04.2017

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Patent

REFRESH TIMER SYNCHRONIZATION BETWEEN MEMORY CONTROLLER AND MEMORY

REFRESH TIMER SYNCHRONIZATION BETWEEN MEMORY CONTROLLER AND MEMORY

by Jose Edwin, Drop Michael
Year of Publication 06.04.2017

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Patent

HYBRID SINGLE AND DUAL-CHANNEL DDR INTERFACE SCHEME BY INTERLEAVING ADDRESS/CONTROL SIGNALS DURING DUAL-CHANNEL OPERATION

HYBRID SINGLE AND DUAL-CHANNEL DDR INTERFACE SCHEME BY INTERLEAVING ADDRESS/CONTROL SIGNALS DURING DUAL-CHANNEL OPERATION

by MAO, Jian, DROP, Michael, SANKURATRI, Raghu
Year of Publication 28.02.2019

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Patent

SYSTEMS AND METHODS FOR INDIVIDUALLY CONFIGURING DYNAMIC RANDOM ACCESS MEMORIES SHARING A COMMON COMMAND ACCESS BUS

SYSTEMS AND METHODS FOR INDIVIDUALLY CONFIGURING DYNAMIC RANDOM ACCESS MEMORIES SHARING A COMMON COMMAND ACCESS BUS

by SRINIVAS, Vaishnav, DROP, Michael, AQUIL, Farrukh, CLOVIS, Philip
Year of Publication 08.07.2020

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Patent

HYBRID SINGLE AND DUAL-CHANNEL DDR INTERFACE SCHEME BY INTERLEAVING ADDRESS/CONTROL SIGNALS DURING DUAL-CHANNEL OPERATION

HYBRID SINGLE AND DUAL-CHANNEL DDR INTERFACE SCHEME BY INTERLEAVING ADDRESS/CONTROL SIGNALS DURING DUAL-CHANNEL OPERATION

by MAO, Jian, DROP, Michael, SANKURATRI, Raghu
Year of Publication 09.05.2018

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Patent

SIGNAL SAMPLING TIMING DRIFT COMPENSATION

SIGNAL SAMPLING TIMING DRIFT COMPENSATION

by DROP, MICHAEL, CHUN, DEXTER TAMIO
Year of Publication 28.04.2016

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Patent

SIGNAL SAMPLING TIMING DRIFT COMPENSATION

SIGNAL SAMPLING TIMING DRIFT COMPENSATION

by DROP MICHAEL, CHUN DEXTER TAMIO
Year of Publication 21.04.2016

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Patent

SYSTEMS AND METHODS FOR INDIVIDUALLY CONFIGURING DYNAMIC RANDOM ACCESS MEMORIES SHARING A COMMON COMMAND ACCESS BUS

SYSTEMS AND METHODS FOR INDIVIDUALLY CONFIGURING DYNAMIC RANDOM ACCESS MEMORIES SHARING A COMMON COMMAND ACCESS BUS

by SRINIVAS, Vaishnav, DROP, Michael, AQUIL, Farrukh, CLOVIS, Philip
Year of Publication 14.08.2019

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Patent

Synchronization of endpoints using tunable latency

Synchronization of endpoints using tunable latency

by Berk Isaac, Drop Michael, Clovis Philip Michael
Year of Publication 11.07.2017

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Patent

SYNCHRONIZATION OF ENDPOINTS USING TUNABLE LATENCY

SYNCHRONIZATION OF ENDPOINTS USING TUNABLE LATENCY

by Berk Isaac, Clovis Phillip Michael, Drop Michael
Year of Publication 23.03.2017

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Patent