A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation
Ditlow, G S, Montoye, R K, Storino, S N, Dance, S M, Ehrenreich, S, Fleischer, B M, Fox, T W, Holmes, K M, Mihara, J, Nakamura, Y, Onishi, S, Shearer, R, Wendel, D, Leland Chang
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
Published in 2011 IEEE International Solid-State Circuits Conference (01.02.2011)
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Conference Proceeding
1Mb 0.41 µm2 2T-2R cell nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing
Jing Li, Montoye, Robert, Ishii, Masatoshi, Stawiasz, Kevin, Nishida, Takeshi, Maloney, Kim, Ditlow, Gary, Lewis, Scott, Maffitt, Tom, Jordan, Richard, Chang, Leland, Peilin Song
Published in 2013 Symposium on VLSI Technology (01.06.2013)
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Published in 2013 Symposium on VLSI Technology (01.06.2013)
Conference Proceeding
1Mb 0.41 µm2 2T-2R cell nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing
Jing Li, Montoye, Robert, Ishii, Masatoshi, Stawiasz, Kevin, Nishida, Takeshi, Maloney, Kim, Ditlow, Gary, Lewis, Scott, Maffitt, Tom, Jordan, Richard, Chang, Leland, Peilin Song
Published in 2013 Symposium on VLSI Circuits (01.06.2013)
Get full text
Published in 2013 Symposium on VLSI Circuits (01.06.2013)
Conference Proceeding