A practical automated timing and physical design implementation methodology for the synchronous asynchronous interface and multi-voltage domain in high-speed synthesis
Hossain, Mozammel, Badar, John, DiLullo, Jack, Chen, Tom
Published in Microprocessors and microsystems (01.09.2016)
Published in Microprocessors and microsystems (01.09.2016)
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Journal Article
Design of the Power6 Microprocessor
Friedrich, Joshua, McCredie, Bradley, James, Norman, Huott, Bill, Curran, Brian, Fluhr, Eric, Mittal, Gaurav, Chan, Eddie, Chan, Yuen, Plass, Donald, Chu, Sam, Le, Hung, Clark, Leo, Ripley, John, Taylor, Scott, Dilullo, Jack, Lanzerotti, Mary
Published in 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (01.02.2007)
Published in 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (01.02.2007)
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Conference Proceeding
IBM POWER6 microprocessor physical design and design methodology
Berridge, R., Averill, R. M., Barish, A. E., Bowen, M. A., Camporese, P. J., DiLullo, J., Dudley, P. E., Keinert, J., Lewis, D. W., Morel, R. D., Rosser, T., Schwartz, N. S., Shephard, P., Smith, H. H., Thomas, D., Restle, P. J., Ripley, J. R., Runyon, S. L., Williams, P. M.
Published in IBM journal of research and development (01.11.2007)
Published in IBM journal of research and development (01.11.2007)
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Journal Article
TIMING ANALYSIS OF A DIGITAL INTEGRATED CIRCUIT USING INTENT BASED TIMING CONSTRAINTS
VERMA, MANISH, DILULLO, JACK, GUPTA, HEMLATA, BASILE, JENNIFER ELIZABETH, BHANJI, ADIL, FOREMAN, ERIC, KALAFALA, KERIM
Year of Publication 03.10.2024
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Year of Publication 03.10.2024
Patent
Physical design of a fourth-generation POWER GHz microprocessor
Anderson, C.J., Petrovick, J., Keaty, J.M., Warnock, J., Nussbaum, G., Tendier, J.M., Carter, C., Chu, S., Clabes, J., DiLullo, J., Dudley, P., Harvey, P., Krauter, B., LeBlanc, J., Pong-Fei Lu, McCredie, B., Plum, G., Restle, P.J., Runyon, S., Scheuermann, M., Schmidt, S., Wagoner, J., Weiss, R., Weitzel, S., Zoric, B.
Published in 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) (2001)
Published in 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177) (2001)
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Conference Proceeding
Journal Article
Design and implementation of the POWER5 microprocessor
CLABES, Joachim, FRIEDRICH, Joshua, SINHAROY, Balaram, LEE, Mike, GOULET, Michael, WAGONER, James, SCHWARTZ, Nicole, RUNYON, Steve, GORMAN, Gary, RESTLE, Phillip, KALLA, Ronald, MCGILL, Joseph, SWEET, Mark, DODSON, Steve, DILULLO, Jack, CHU, Sam, PLASS, Donald, DAWSON, James, MUENCH, Paul, POWELL, Larry, FLOYD, Michael
Year of Publication 2004
Year of Publication 2004
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Conference Proceeding
Clock domain-independent abstracts
Abdul, Naiju K, Verma, Manish, Bhanji, Adil, Kalafala, Kerim, DiLullo, Jack, Leitzen, Jeremy J
Year of Publication 11.06.2019
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Year of Publication 11.06.2019
Patent
DYNAMIC UPDATE OF MACRO TIMING MODELS DURING HIGHER-LEVEL TIMING ANALYSIS
Hughes, Edward, Gupta, Hemlata, Matheny, Adam, Robert, Michel P, Basile, Jennifer E, Bhanji, Adil, Kalafala, Kerim, Buck, Nathan, Suess, Alexander, DiLullo, Jack, Wood, Michael H
Year of Publication 28.11.2019
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Year of Publication 28.11.2019
Patent
CLOCK DOMAIN-INDEPENDENT ABSTRACTS
DiLullo Jack, Bhanji Adil, Kalafala Kerim, Abdul Naiju K, Leitzen Jeremy J, Verma Manish
Year of Publication 23.11.2017
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Year of Publication 23.11.2017
Patent
Design and implementation of the POWER5™ microprocessor
Clabes, Joachim, Friedrich, Joshua, Sweet, Mark, DiLullo, Jack, Chu, Sam, Plass, Donald, Dawson, James, Muench, Paul, Powell, Larry, Floyd, Michael, Sinharoy, Balaram, Lee, Mike, Goulet, Michael, Wagoner, James, Schwartz, Nicole, Runyon, Steve, Gorman, Gary, Restle, Phillip, Kalla, Ronald, McGill, Joseph, Dodson, Steve
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004 (07.06.2004)
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004 (07.06.2004)
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Conference Proceeding
Specifying and validating untimed nets
DILULLO JACK, MEIL GAVIN BALFOUR, KALLA RONALD NICK, RITZINGER JEFFREY MARK
Year of Publication 21.02.2012
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Year of Publication 21.02.2012
Patent
Specifying and validating untimed nets
DiLullo, Jack, Kalla, Ronald Nick, Meil, Gavin Balfour, Ritzinger, Jeffrey Mark
Year of Publication 21.02.2012
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Year of Publication 21.02.2012
Patent
Modeling full and half cycle clock variability
JOSHI PRASHANT D, VICTORIA VERN ANTHONY, DILULLO JACK, BHANJI ADIL, WILLIAMS ALBERT THOMAS, CAREY SEAN MICHAEL, ROZALES DON RICHARD
Year of Publication 22.05.2012
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Year of Publication 22.05.2012
Patent
Modeling full and half cycle clock variability
Bhanji, Adil, Carey, Sean Michael, Dilullo, Jack, Joshi, Prashant D, Rozales, Don Richard, Victoria, Vern Anthony, Williams, Albert Thomas
Year of Publication 22.05.2012
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Year of Publication 22.05.2012
Patent
Method for Specifying and Validating Untimed Nets
DILULLO JACK, MEIL GAVIN BALFOUR, KALLA RONALD NICK, RITZINGER JEFFREY MARK
Year of Publication 06.05.2010
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Year of Publication 06.05.2010
Patent
MODELING FULL AND HALF CYCLE CLOCK VARIABILITY
JOSHI PRASHANT D, VICTORIA VERN ANTHONY, DILULLO JACK, BHANJI ADIL, WILLIAMS ALBERT THOMAS, CAREY SEAN MICHAEL, ROZALES DON RICHARD
Year of Publication 21.10.2010
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Year of Publication 21.10.2010
Patent