Search Results - "Di Sarro, James P" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

A Scalable SCR Compact Model for ESD Circuit Simulation

A Scalable SCR Compact Model for ESD Circuit Simulation

by Di Sarro, J P, Rosenbaum, E
Published in IEEE transactions on electron devices (01.12.2010)

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Journal Article

Oscillatory Transmission Line Pulsing for Characterization of Device Transient Response

Oscillatory Transmission Line Pulsing for Characterization of Device Transient Response

by Di Sarro, J.P., Rosenbaum, E.
Published in IEEE electron device letters (01.02.2009)

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Journal Article

ESD device with fast response and high transient current

ESD device with fast response and high transient current

by Appaswamy, Aravind C, Di Sarro, James P
Year of Publication 20.12.2022

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Patent

Influence of Package Trace Properties on CDM Stress

Influence of Package Trace Properties on CDM Stress

by Di Sarro, James P., Reynolds, Bill, Gauthier, Robert
Published in IEEE transactions on device and materials reliability (01.09.2014)

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Magazine Article

ESD protection charge pump active clamp for low-leakage applications

ESD protection charge pump active clamp for low-leakage applications

by Farbiz, Farzan, Di Sarro, James P
Year of Publication 07.09.2021

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Patent

ESD DEVICE WITH FAST RESPONSE AND HIGH TRANSIENT CURRENT

ESD DEVICE WITH FAST RESPONSE AND HIGH TRANSIENT CURRENT

by Appaswamy, Aravind C, Di Sarro, James P
Year of Publication 25.03.2021

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Patent

ESD device with fast response and high transient current

ESD device with fast response and high transient current

by Appaswamy, Aravind C, Di Sarro, James P
Year of Publication 08.12.2020

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Patent

Conductivity modulated drain extended MOSFET

Conductivity modulated drain extended MOSFET

by Appaswamy, Aravind C, Farbiz, Farzan, Di Sarro, James P
Year of Publication 05.10.2021

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Patent

ESD Protection Charge Pump Active Clamp for Low-Leakage Applications

ESD Protection Charge Pump Active Clamp for Low-Leakage Applications

by Farbiz, Farzan, Di Sarro, James P
Year of Publication 07.11.2019

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Patent

ESD protection charge pump active clamp for low-leakage applications

ESD protection charge pump active clamp for low-leakage applications

by Farbiz, Farzan, Di Sarro, James P
Year of Publication 27.08.2019

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Patent

ESD DEVICE WITH FAST RESPONSE AND HIGH TRANSIENT CURRENT

ESD DEVICE WITH FAST RESPONSE AND HIGH TRANSIENT CURRENT

by Appaswamy, Aravind C, Di Sarro, James P
Year of Publication 07.02.2019

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Patent

Conductivity Modulated Drain Extended MOSFET

Conductivity Modulated Drain Extended MOSFET

by Appaswamy, Aravind C, Farbiz, Farzan, Di Sarro, James P
Year of Publication 05.03.2020

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Patent

ESD PROTECTION CHARGE PUMP ACTIVE CLAMP FOR LOW-LEAKAGE APPLICATIONS

ESD PROTECTION CHARGE PUMP ACTIVE CLAMP FOR LOW-LEAKAGE APPLICATIONS

by Farbiz Farzan, Di Sarro James P
Year of Publication 05.04.2018

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Patent

Conductivity modulated drain extended MOSFET

Conductivity modulated drain extended MOSFET

by Appaswamy, Aravind C, Farbiz, Farzan, Di Sarro, James P
Year of Publication 07.01.2020

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Patent

Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers

Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers

by Jack, Nathan D, Gauthier, Jr., Robert J, Mitra, Souvick, Di Sarro, James P, Li, JunJun
Year of Publication 25.08.2020

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Patent

Conductivity Modulated Drain Extended MOSFET

Conductivity Modulated Drain Extended MOSFET

by Appaswamy, Aravind C, Farbiz, Farzan, Di Sarro, James P
Year of Publication 28.06.2018

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Patent

Conductivity modulated drain extended MOSFET

Conductivity modulated drain extended MOSFET

by Farbiz Farzan, Appaswamy Aravind C, Di Sarro James P
Year of Publication 27.02.2018

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Patent

ESD NETWORK COMPRISING VARIABLE IMPEDANCE DISCHARGE PATH

ESD NETWORK COMPRISING VARIABLE IMPEDANCE DISCHARGE PATH

by Concannon, Ann Margaret, Rajagopal, Krishna Praveen Mysore, Di Sarro, James P, Dissegna, Mariano, Wang, Lihui
Year of Publication 28.03.2019

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Patent

Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers

Structure and method for dynamic biasing to improve ESD robustness of current mode logic (CML) drivers

by Jack, Nathan D, Gauthier, Robert J, Mitra, Souvick, Di Sarro, James P, Li, JunJun
Year of Publication 15.01.2019

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Patent

IGBT coupled to a reverse bias device in series

IGBT coupled to a reverse bias device in series

by Mysore Rajagopal, Krishna Praveen, Salman, Akram A, Ali, Muhammad Yusuf, Appaswamy, Aravind Chennimalai, Di Sarro, James P
Year of Publication 02.04.2019

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Patent