Silicon CMOS devices beyond scaling
Haensch, W., Nowak, E. J., Dennard, R. H., Solomon, P. M., Bryant, A., Dokumaci, O. H., Kumar, A., Wang, X., Johnson, J. B., Fischetti, M. V.
Published in IBM journal of research and development (01.07.2006)
Published in IBM journal of research and development (01.07.2006)
Get full text
Journal Article
Device scaling limits of Si MOSFETs and their application dependencies
Frank, D.J., Dennard, R.H., Nowak, E., Solomon, P.M., Taur, Y., Hon-Sum Philip Wong
Published in Proceedings of the IEEE (01.03.2001)
Published in Proceedings of the IEEE (01.03.2001)
Get full text
Journal Article
A room temperature 0.1 μm CMOS on SOI
SHAHIDI, G. G, ANDERSON, C. A, NING, T. H, POLCARI, M. R, WARNOCK, J. D, CHAPPELL, B. A, CHAPPELL, T. I, COMFORT, J. H, DAVARI, B, DENNARD, R. H, FRANCH, R. L, MCFARLAND, P. A, NEELY, J. S
Published in IEEE transactions on electron devices (01.12.1994)
Published in IEEE transactions on electron devices (01.12.1994)
Get full text
Journal Article
Transient pass-transistor leakage current in SOI MOSFET's
Assaderaghi, F., Shahidi, G.G., Wagner, L., Hsieh, M., Pelella, M., Chu, S., Dennard, R.H., Davari, B.
Published in IEEE electron device letters (01.06.1997)
Published in IEEE electron device letters (01.06.1997)
Get full text
Journal Article
Design and characteristics of n-channel insulated-gate field-effect transistors
Critchlow, D L, Dennard, R H, Schuster, S E
Published in IBM journal of research and development (01.01.2000)
Published in IBM journal of research and development (01.01.2000)
Get full text
Journal Article
When are transmission-line effects important for on-chip interconnections?
Deutsch, A., Kopcsay, G.V., Restle, P.J., Smith, H.H., Katopis, G., Becker, W.D., Coteus, P.W., Surovic, C.W., Rubin, B.J., Dunne, R.P., Gallo, T., Jenkins, K.A., Terman, L.M., Dennard, R.H., Sai-Halasz, G.A., Krauter, B.L., Knebel, D.R.
Published in IEEE transactions on microwave theory and techniques (01.10.1997)
Published in IEEE transactions on microwave theory and techniques (01.10.1997)
Get full text
Journal Article
A novel dynamic memory cell with internal voltage gain
Get full text
Journal Article
Conference Proceeding
Gated-diode amplifiers
Luk, W.K., Dennard, R.H.
Published in IEEE transactions on circuits and systems. II, Express briefs (01.05.2005)
Published in IEEE transactions on circuits and systems. II, Express briefs (01.05.2005)
Get full text
Journal Article
Submicrometer-channel CMOS for low-temperature operation
Sun, J.Y.-C., Yuan Taur, Dennard, R.H., Klepner, S.P.
Published in IEEE transactions on electron devices (01.01.1987)
Published in IEEE transactions on electron devices (01.01.1987)
Get full text
Journal Article
An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches
Chang, L., Montoye, R.K., Nakamura, Y., Batson, K.A., Eickemeyer, R.J., Dennard, R.H., Haensch, W., Jamsek, D.
Published in IEEE journal of solid-state circuits (01.04.2008)
Published in IEEE journal of solid-state circuits (01.04.2008)
Get full text
Journal Article
Conference Proceeding
Generalized scaling theory and its application to a 1/4 micrometer MOSFET design
Baccarani, G, Wordeman, M R, Dennard, R H
Published in IEEE transactions on electron devices (01.01.1984)
Published in IEEE transactions on electron devices (01.01.1984)
Get full text
Journal Article
A fully scaled submicrometer NMOS technology using direct-write E-beam lithography
Wordeman, M.R., Schweighart, A.M., Dennard, R.H., Sai-Halasz, G., Molzen, W.W.
Published in IEEE transactions on electron devices (01.01.1985)
Published in IEEE transactions on electron devices (01.01.1985)
Get full text
Journal Article
Iddq test: sensitivity analysis of scaling
Williams, T.W., Dennard, R.H., Kapur, R., Mercer, M.R., Maly, M.
Published in Proceedings International Test Conference 1996. Test and Design Validity (1996)
Published in Proceedings International Test Conference 1996. Test and Design Validity (1996)
Get full text
Conference Proceeding
Design of micron MOS switching devices
Dennard, R. H., Gaensslen, F. H., Kuhn, L., Yu, H. N.
Published in IEEE Solid-State Circuits Society Newsletter (2007)
Published in IEEE Solid-State Circuits Society Newsletter (2007)
Get full text
Newsletter
Journal Article
A 4-Mb low-temperature DRAM
Henkels, W.H., Wen, D.-S., Mohler, R.L., Franch, R.L., Bucelot, T.J., Long, C.W., Bracchitta, J.A., Cote, W.J., Bronner, G.B., Taur, Y., Dennard, R.H.
Published in IEEE journal of solid-state circuits (01.11.1991)
Published in IEEE journal of solid-state circuits (01.11.1991)
Get full text
Journal Article
Ion implanted MOSFET's with very short channel lengths
Dennard, R. H., Gaensslen, F. H., Yu, H. N., Rideout, V. L., Bassous, E., LeBlanc, A.
Published in IEEE Solid-State Circuits Society Newsletter (2007)
Published in IEEE Solid-State Circuits Society Newsletter (2007)
Get full text
Newsletter
Journal Article
Design and experimental technology for 0.1-μm gate-length low-temperature operation FET's
SAI-HALASZ, G. A, WORDEMAN, M. R, CHANG, T. H. P, DENNARD, R. H, KERN, D. P, GANIN, E, RISHTON, S, ZICHERMAN, D. S, SCHMID, H, POLCARI, M. R, NG, H. Y, RESTLE, P. J
Published in IEEE electron device letters (1987)
Published in IEEE electron device letters (1987)
Get full text
Journal Article
High-performance Si1−xGex channel on insulator trigate PFETs featuring an implant-free process and aggressively-scaled fin and gate dimensions
Hashemi, P., Kobayashi, M., Majumdar, A., Yang, L. A., Baraskar, A., Balakrishnan, K., Kim, W., Chan, K., Engelmann, S. U., Ott, J. A., Bedell, S. W., Murray, C. E., Liang, S., Dennard, R. H., Sleight, J. W., Leobandung, E., Park, D.-G
Published in 2013 Symposium on VLSI Technology (01.06.2013)
Get full text
Published in 2013 Symposium on VLSI Technology (01.06.2013)
Conference Proceeding