A 7F/sup 2/ cell and bitline architecture featuring tilted array devices and penalty-free vertical BL twists for 4-Gb DRAMs
Hoenigschmid, H., Frey, A., DeBrosse, J.K., Kirihata, T., Mueller, G., Storaska, D.W., Daniel, G., Frankowsky, G., Guay, K.P., Hanson, D.R., Hsu, L.L.-C., Ji, B., Netis, D.G., Panaroni, S., Radens, C., Reith, A.M., Terletzki, H., Weinfurtner, O., Alsmeier, J., Weber, W., Wordeman, M.R.
Published in IEEE journal of solid-state circuits (01.05.2000)
Published in IEEE journal of solid-state circuits (01.05.2000)
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Journal Article
A 7F2 cell and bitline architecture featuring tilted array devices and penalty-free vertical BL twists for 4-Gb DRAMs
Hoenigschmid, H, Frey, A, DeBrosse, J.K, Kirihata, T, Mueller, G, Storaska, D.W, Daniel, G, Frankowsky, G, Guay, K.P, Hanson, D.R, Hsu, L.L.-C, Ji, B, Netis, D.G, Panaroni, S, Radens, C, Reith, A.M, Terletzki, H, Weinfurtner, O, Alsmeier, J, Weber, W, Wordeman, M.R
Published in IEEE journal of solid-state circuits (01.05.2000)
Published in IEEE journal of solid-state circuits (01.05.2000)
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Journal Article
A 220-mm/sup 2/, four- and eight-bank, 256-Mb SDRAM with single-sided stitched WL architecture
Kirihata, T., Gall, M., Hosokawa, K., Dortu, J.-M., Hing Wong, Pfefferi, P., Ji, B.L., Weinfurtner, O., DeBrosse, J.K., Terletzki, H., Selz, M., Ellis, W., Wordeman, M.R., Kiehl, O.
Published in IEEE journal of solid-state circuits (01.11.1998)
Published in IEEE journal of solid-state circuits (01.11.1998)
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Journal Article
Fault-tolerant designs for 256 Mb DRAM
Kirihata, T., Watanabe, Y., Hing Wong, DeBrosse, J.K., Yoshida, M., Kato, D., Fujii, S., Wordeman, M.R., Poechmueller, P., Parke, S.A., Asao, Y.
Published in IEEE journal of solid-state circuits (01.04.1996)
Published in IEEE journal of solid-state circuits (01.04.1996)
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Journal Article
Flexible test mode approach for 256-Mb DRAM
Kirihata, T., Hing Wong, DeBrosse, J.K., Watanabe, Y., Hara, T., Yoshida, M., Wordeman, M.R., Fujii, S., Asao, Y., Krsnik, B.
Published in IEEE journal of solid-state circuits (01.10.1997)
Published in IEEE journal of solid-state circuits (01.10.1997)
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Journal Article
A 286 mm/sup 2/ 256 Mb DRAM with /spl times/32 both-ends DQ
Watanabe, Y., Hing Wong, Kirihata, T., Kato, D., DeBrosse, J.K., Hara, T., Yoshida, M., Mukai, H., Quader, K.N., Nagai, T., Poechmueller, P., Pfefferl, P., Wordeman, M.R., Fujii, S.
Published in IEEE journal of solid-state circuits (01.04.1996)
Published in IEEE journal of solid-state circuits (01.04.1996)
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Journal Article
A 286 mm/sup 2/ 256 Mb DRAM with ×32 both-ends DQ
Watanabe, Y., Hing Wong, Kirihata, T., Kato, D., DeBrosse, J.K., Hara, T., Yoshida, M., Mukai, H., Quader, K.N., Nagai, T., Poechmueller, P., Pfefferl, P., Wordeman, M.R., Fujii, S.
Published in IEEE journal of solid-state circuits (01.04.1996)
Published in IEEE journal of solid-state circuits (01.04.1996)
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Journal Article
Floating-body concerns for SOI dynamic random access memory (DRAM)
Mandelman, J.A., Barth, J.E., DeBrosse, J.K., Dennard, R.H., Kalter, H.L., Gautier, J., Hanafi, H.I.
Published in 1996 IEEE International SOI Conference Proceedings (1996)
Published in 1996 IEEE International SOI Conference Proceedings (1996)
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Conference Proceeding
A 0.21 /spl mu/m/sup 2/ 7F/sup 2/ trench cell with a locally-open globally-folded dual bitline for 1 Gb/4 Gb DRAM
Radens, C.J., Gruening, U., Weybright, M.E., DeBrosse, J.K., Kleinhenz, R.L., Hoenigschmid, H., Thomas, A.C., Mandelman, J.A., Alsmeier, J., Bronner, G.B.
Published in 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216) (1998)
Published in 1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216) (1998)
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Conference Proceeding
A new planarization technique, using a combination of RIE and chemical mechanical polish (CMP)
Davarik, B., Koburger, C.W., Schulz, R., Warnock, J.D., Furukawa, T., Jost, M., Taur, Y., Schwittek, W.G., DeBrosse, J.K., Kerbaugh, M.L., Mauer, J.L.
Published in International Technical Digest on Electron Devices Meeting (1989)
Published in International Technical Digest on Electron Devices Meeting (1989)
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Conference Proceeding