Search Results - "DIXON, MARTIN, G" :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm2, 1mm Package-on-Package

8.1 Lakefield and Mobility Compute: A 3D Stacked 10nm and 22FFL Hybrid Processor System in 12×12mm2, 1mm Package-on-Package

by Gomes, Wilfred, Khushu, Sanjeev, Ingerly, Doug B., Stover, Patrick N., Chowdhury, Nasirul I., O'Mahony, Frank, Balankutty, Ajay, Dolev, Noam, Dixon, Martin G., Jiang, Lei, Prekke, Surya, Patra, Biswajit, Rott, Pavel V., Kumar, Rajesh
Published in 2020 IEEE International Solid- State Circuits Conference - (ISSCC) (01.02.2020)

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Conference Proceeding

SYSTEM, METHOD, AND APPARATUS FOR PERFORMING CACHE FLUSH OF PAGES OF GIVEN RANGE AND TLB INVALIDATION OF ENTRIES OF GIVEN RANGE

SYSTEM, METHOD, AND APPARATUS FOR PERFORMING CACHE FLUSH OF PAGES OF GIVEN RANGE AND TLB INVALIDATION OF ENTRIES OF GIVEN RANGE

by DIXON MARTIN G, SCOTT D RODGERS
Year of Publication 30.04.2015

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Patent

INSTRUCTION EMULATION PROCESSORS, METHODS AND SYSTEMS

INSTRUCTION EMULATION PROCESSORS, METHODS AND SYSTEMS

by YAZMIN A SANTIAGO, WILLIAM C RASH, DIXON MARTIN G
Year of Publication 08.12.2016

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Patent

PROCESSOR, METHOD, SYSTEM, AND PROGRAM TO RELAX SYNCHRONIZATION OF ACCESS TO SHARED MEMORY

PROCESSOR, METHOD, SYSTEM, AND PROGRAM TO RELAX SYNCHRONIZATION OF ACCESS TO SHARED MEMORY

by YAZMIN A SANTIAGO, DIXON MARTIN G, WILLIAM C RASH
Year of Publication 08.12.2016

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Patent

INSTRUCTION FOR PERFORMING AN OVERLOAD CHECK

INSTRUCTION FOR PERFORMING AN OVERLOAD CHECK

by DIXON MARTIN G, PATEL BAIJU, GOPALAKRISHNA RAJEEV
Year of Publication 24.09.2014

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Patent

INSTRUCTION ORDER ENFORCEMENT PAIRS OF INSTRUCTIONS, PROCESSORS, METHODS, AND SYSTEMS

INSTRUCTION ORDER ENFORCEMENT PAIRS OF INSTRUCTIONS, PROCESSORS, METHODS, AND SYSTEMS

by DIXON MARTIN G, SANTIAGO YAZMIN A, RASH WILLIAM C
Year of Publication 09.12.2015

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Patent

SYSTEM FOR PERFORMING SHIFT AND EXCLUSIVE OR OPERATION IN SINGLE INSTRUCTION

SYSTEM FOR PERFORMING SHIFT AND EXCLUSIVE OR OPERATION IN SINGLE INSTRUCTION

by WAJDI FEGHALI, GOPAL VINODH, DIXON MARTIN G, GILBERT M WOLRICH, JAMES D GUILFORD, OZTURK ERDINC
Year of Publication 31.08.2017

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Patent

SYSTEM, METHOD, AND APPARATUS FOR A CACHE FLUSH OF A RANGE OF PAGES AND TLB INVALIDATION OF A RANGE OF ENTRIES

SYSTEM, METHOD, AND APPARATUS FOR A CACHE FLUSH OF A RANGE OF PAGES AND TLB INVALIDATION OF A RANGE OF ENTRIES

by DIXON MARTIN G, RODGERS SCOTT D
Year of Publication 29.08.2012

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Patent

PROCESSORS, METHODS, AND SYSTEMS TO RELAX SYNCHRONIZATION OF ACCESSES TO SHARED MEMORY

PROCESSORS, METHODS, AND SYSTEMS TO RELAX SYNCHRONIZATION OF ACCESSES TO SHARED MEMORY

by DIXON MARTIN G, RASH. WILLIAM C, SANTIAGO YAZMIN A
Year of Publication 24.09.2014

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Patent

INSTRUCTION EMULATION PROCESSORS, METHODS, AND SYSTEMS

INSTRUCTION EMULATION PROCESSORS, METHODS, AND SYSTEMS

by DIXON MARTIN G, SANTIAGO YAZMIN A, RASH WILLIAM C
Year of Publication 24.09.2014

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Patent

PROCESSOR, METHOD, PROGRAM, AND MACHINE-READABLE STORAGE MEDIUM

PROCESSOR, METHOD, PROGRAM, AND MACHINE-READABLE STORAGE MEDIUM

by MAHURIN ERIC, GOPAL VINODH, DIXON MARTIN G, MIRKES SEAN P, KREITZER DAVID L, LOKTYUKHIN MAXIM, TOLL BRET L, OULD-AHMED-VALL EL MOUSTAPHA
Year of Publication 11.10.2018

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Patent

METHOD AND APPARATUS FOR PERFORMING SHIFT AND EXCLUSIVE OR OPERATION IN SINGLE INSTRUCTION

METHOD AND APPARATUS FOR PERFORMING SHIFT AND EXCLUSIVE OR OPERATION IN SINGLE INSTRUCTION

by WAJDI FEGHALI, GOPAL VINODH, DIXON MARTIN G, JAMES D GUILFORD, OZTURK ERDINC, WOLRICH GILBERT M
Year of Publication 10.09.2015

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Patent

PROCESSOR, METHOD, SYSTEM AND PROGRAM

PROCESSOR, METHOD, SYSTEM AND PROGRAM

by DIXON MARTIN G, SCOTT D RODGERS, HAMMARLUND PER, STEPHEN H GUNTHER, PRASHANT SETHI, TARANEH BAHRAMI
Year of Publication 27.11.2014

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Patent

CONVERTING CONDITIONAL SHORT FORWARD BRANCHES TO COMPUTATIONALLY EQUIVALENT PREDICATED INSTRUCTIONS

CONVERTING CONDITIONAL SHORT FORWARD BRANCHES TO COMPUTATIONALLY EQUIVALENT PREDICATED INSTRUCTIONS

by NAIK MISHALI, DIXON MARTIN G, SANTIAGO YAZMIN A, GROCHOWSKI EDWARD T
Year of Publication 24.09.2014

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Patent

PROCESSOR, SYSTEM ON CHIP (SOC), HANDHELD DEVICE, AND APPARATUS

PROCESSOR, SYSTEM ON CHIP (SOC), HANDHELD DEVICE, AND APPARATUS

by MAHURIN ERIC, GOPAL VINODH, DIXON MARTIN G, MIRKES SEAN P, KREITZER DAVID L, LOKTYUKHIN MAXIM, TOLL BRET L, OULD-AHMED-VALL EL MOUSTAPHA
Year of Publication 12.02.2016

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Patent

SYSTEM, APPARATUS, AND METHOD FOR SEGMENT REGISTER READ AND WRITE REGARDLESS OF PRIVILEGE LEVEL

SYSTEM, APPARATUS, AND METHOD FOR SEGMENT REGISTER READ AND WRITE REGARDLESS OF PRIVILEGE LEVEL

by NEIGER GILBERT, DIXON MARTIN G, COKE JAMES S, PATEL BAIJU V, CROSSLAND JAMES B
Year of Publication 14.10.2013

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Patent

Toward postquantum security for embedded cores

Toward postquantum security for embedded cores

by Misoczki, Rafael, Gulley, Sean, Gopal, Vinodh, Dixon, Martin G., Vrsalovic, Hrvoje, Feghali, Wajdi K.
Published in IEEE MICRO (01.07.2019)

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Journal Article

MULTI-CORE PROCESSOR, SYSTEM ON CHIP, AND MOBILE PHONE

MULTI-CORE PROCESSOR, SYSTEM ON CHIP, AND MOBILE PHONE

by GOPAL VINODH, DIXON MARTIN G, FARCY ALEXANDRE J, MIRKES SEAN P, DAVIS MARK C, GUILFORD JAMES D, FEGHALI WAJDI K, LOKTYUKHIN MAXIM, TOLL BRET L, WOLRICH GILBERT M, OZTURK ERDINC
Year of Publication 19.01.2017

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Patent

QOS BASED BINARY TRANSLATION AND APPLICATION STREAMING

QOS BASED BINARY TRANSLATION AND APPLICATION STREAMING

by HAHN SCOTT D, DIXON MARTIN G, MUTHIAH BHARATH, HINTON GLENN J, PAPWORTH DAVID B, RASH WILLIAM BILL
Year of Publication 24.09.2014

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Patent

INSTRUCTION FOR ENABLING A PROCESSOR WAIT STATE

INSTRUCTION FOR ENABLING A PROCESSOR WAIT STATE

by DIXON MARTIN G, GUNTHER STEPHEN H, RODGERS SCOTT D, HAMMARLUND PER, BAHRAMI TARANEH, SETHI PRASHANT
Year of Publication 09.10.2012

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Patent

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