High-Speed LDPC Decoders Towards 1 Tb/s
Li, Meng, Derudder, Veerle, Bertrand, Kaoutar, Desset, Claude, Bourdoux, Andre
Published in IEEE transactions on circuits and systems. I, Regular papers (01.05.2021)
Published in IEEE transactions on circuits and systems. I, Regular papers (01.05.2021)
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Journal Article
4.1 A 16GHz, 41\text} Frequency Error, Background-Calibrated, Duty-Cycled FMCW Charge-Pump PLL
Renukaswamy, Pratap Tumkur, Vaesen, Kristof, Markulic, Nereo, Derudder, Veerle, Park, Dae-Woong, Wambacq, Piet, Craninckx, Jan
Published in 2023 IEEE International Solid- State Circuits Conference (ISSCC) (19.02.2023)
Published in 2023 IEEE International Solid- State Circuits Conference (ISSCC) (19.02.2023)
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Conference Proceeding
A 79-GHz 2 \times 2 MIMO PMCW Radar SoC in 28-nm CMOS
Guermandi, Davide, Qixian Shi, Dewilde, Andy, Derudder, Veerle, Ahmad, Ubaid, Spagnolo, Annachiara, Ocket, Ilja, Bourdoux, Andre, Wambacq, Piet, Craninckx, Jan, Van Thillo, Wim
Published in IEEE journal of solid-state circuits (01.10.2017)
Published in IEEE journal of solid-state circuits (01.10.2017)
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Journal Article
Tb/s Polar Successive Cancellation Decoder 16nm ASIC Implementation
Süral, Altuğ, Sezer, E. Göksu, Kolağasıoğlu, Ertuğrul, Derudder, Veerle, Bertrand, Kaoutar
Year of Publication 20.09.2020
Year of Publication 20.09.2020
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Journal Article
A 100 Gbps LDPC Decoder for the IEEE 802.11ay Standard
Li, Meng, Derudder, Veerle, Desset, Claude, Dewilde, Andy, Bourdoux, Andre, Huang, Yanxiang
Published in 2018 IEEE 10th International Symposium on Turbo Codes & Iterative Information Processing (ISTC) (01.12.2018)
Published in 2018 IEEE 10th International Symposium on Turbo Codes & Iterative Information Processing (ISTC) (01.12.2018)
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Conference Proceeding
80-Mb/s QPSK and 72-Mb/s 64-QAM flexible and scalable digital OFDM transceiver ASICs for wireless local area networks in the 5-GHz band
Eberle, W., Derudder, V., Vanwijnsberghe, G., Vergara, M., Deneire, L., Van der Perre, L., Engels, M.G.E., Bolsens, I., De Man, H.
Published in IEEE journal of solid-state circuits (01.11.2001)
Published in IEEE journal of solid-state circuits (01.11.2001)
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Journal Article
An energy efficient 18Gbps LDPC decoding processor for 802.11ad in 28nm CMOS
Meng Li, Weijers, Jan-Willem, Derudder, Veerle, Vos, Ilse, Rykunov, Maxim, Dupont, Steven, Debacker, Peter, Dewilde, Andy, Yanxiang Huang, Van der Perre, Liesbet, Van Thillo, Wim
Published in 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC) (01.11.2015)
Published in 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC) (01.11.2015)
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Conference Proceeding
An integrated reconfigurable engine for multi-purpose sensing up to 6 GHz
Pollin, S., Hollevoet, L., Van Wesemael, P., Desmet, M., Bourdoux, A., Lopez, E., Naessens, F., Raghavan, P., Derudder, V., Dupont, S., Dejonghe, A.
Published in 2011 IEEE International Symposium on Dynamic Spectrum Access Networks (DySPAN) (01.05.2011)
Published in 2011 IEEE International Symposium on Dynamic Spectrum Access Networks (DySPAN) (01.05.2011)
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Conference Proceeding
Energy-efficient software-defined radio solutions for MIMO-based broadband communication
Bougard, Bruno, Bourdoux, Andre, Naessens, Frederik, Glassee, Miguel, Derudder, Veerle, Van der Perre, Liesbet
Published in 2007 15th European Signal Processing Conference (01.09.2007)
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Published in 2007 15th European Signal Processing Conference (01.09.2007)
Conference Proceeding
An approach for real time prototyping of MIMO-OFDM systems
Wouters, Maryse, Bourdoux, Andre, Derore, Stefaan, Janssens, Sven, Derudder, Veerle
Published in 2004 12th European Signal Processing Conference (01.09.2004)
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Published in 2004 12th European Signal Processing Conference (01.09.2004)
Conference Proceeding
Journal Article
Ver- und Entschachtellungsapparat und Verfahren
DERUDDER, VEERLE, COSGUL, GOKHAN, SCHURGERS, CURT, BOUGARD, BRUNO, GIESE, JOCHEN UWE, GIULIETTI, ALEXANDRE, THUL, MICHAEL
Year of Publication 24.12.2008
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Year of Publication 24.12.2008
Patent
VER- UND ENTSCHACHTELLUNGSAPPARAT UND VERFAHREN
DERUDDER, VEERLE, COSGUL, GOKHAN, SCHURGERS, CURT, BOUGARD, BRUNO, GIESE, JOCHEN UWE, GIULIETTI, ALEXANDRE, THUL, MICHAEL
Year of Publication 15.02.2008
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Year of Publication 15.02.2008
Patent
A method and apparatus for interleaving, deinterleaving
DERUDDER, VEERLE, COSGUL, GOKHAN, SCHURGERS, CURT, BOUGARD, BRUNO, GIESE, JOCHEN UWE, GIULIETTI, ALEXANDRE, THUL, MICHAEL
Year of Publication 30.01.2008
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Year of Publication 30.01.2008
Patent
Optimization method for broadband modem FIR filter design using common subexpression elimination
Pasko, Robert, Schaumont, Patrick, Derudder, Veerle, Durackova, Daniela
Published in International Symposium on Systems Synthesis: Proceedings of the 10th international symposium on System synthesis; 17-19 Sept. 1997 (17.09.1997)
Published in International Symposium on Systems Synthesis: Proceedings of the 10th international symposium on System synthesis; 17-19 Sept. 1997 (17.09.1997)
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