Confined Epitaxial Lateral Overgrowth (CELO): A novel concept for scalable integration of CMOS-compatible InGaAs-on-insulator MOSFETs on large-area Si substrates
Czornomaz, L., Uccelli, E., Sousa, M., Deshpande, V., Djara, V., Caimi, D., Rossell, M. D., Erni, R., Fompeyrine, J.
Published in 2015 Symposium on VLSI Technology (VLSI Technology) (01.06.2015)
Published in 2015 Symposium on VLSI Technology (VLSI Technology) (01.06.2015)
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Towards large size substrates for III-V co-integration made by direct wafer bonding on Si
Daix, N., Uccelli, E., Czornomaz, L., Caimi, D., Rossel, C., Sousa, M., Siegwart, H., Marchiori, C., Hartmann, J. M., Shiu, K.-T., Cheng, C.-W., Krishnan, M., Lofaro, M., Kobayashi, M., Sadana, D., Fompeyrine, J.
Published in APL materials (01.08.2014)
Published in APL materials (01.08.2014)
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Journal Article
CMOS compatible self-aligned S/D regions for implant-free InGaAs MOSFETs
Czornomaz, L., El Kazzi, M., Hopstaken, M., Caimi, D., Mächler, P., Rossel, C., Bjoerk, M., Marchiori, C., Siegwart, H., Fompeyrine, J.
Published in Solid-state electronics (01.08.2012)
Published in Solid-state electronics (01.08.2012)
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Journal Article
Strain effects on n-InGaAs heterostructure-on-insulator made by direct wafer bonding
Rossel, C., Weigele, P., Czornomaz, L., Daix, N., Caimi, D., Sousa, M., Fompeyrine, J.
Published in Solid-state electronics (01.08.2014)
Published in Solid-state electronics (01.08.2014)
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Journal Article
Nanoscale physics and defect state chemistry at amorphous-Si/In0.53Ga0.47As interfaces
Marchiori, C, El Kazzi, M, Czornomaz, L, Pierucci, D, Silly, M, Sirotti, F, Abel, S, Uccelli, E, Sousa, M, Fompeyrine, J
Published in Journal of physics. D, Applied physics (05.02.2014)
Published in Journal of physics. D, Applied physics (05.02.2014)
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Journal Article
First demonstration of InGaAs/SiGe CMOS inverters and dense SRAM arrays on Si using selective epitaxy and standard FEOL processes
Czornomaz, L., Djara, V., Deshpande, V., O'Connor, E., Sousa, M., Caimi, D., Cheng, K., Fompeyrine, J.
Published in 2016 IEEE Symposium on VLSI Technology (01.06.2016)
Published in 2016 IEEE Symposium on VLSI Technology (01.06.2016)
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An InGaAs on Si platform for CMOS with 200 mm InGaAs-OI substrate, gate-first, replacement gate planar and FinFETs down to 120 nm contact pitch
Djara, V., Deshpande, V., Uccelli, E., Daix, N., Caimi, D., Rossel, C., Sousa, M., Siegwart, H., Marchiori, C., Hartmann, J. M., Shiu, K.-T, Weng, C.-W, Krishnan, M., Lofaro, M., Steiner, R., Sadana, D., Lubyshev, D., Liu, A., Czornomaz, L., Fompeyrine, J.
Published in 2015 Symposium on VLSI Technology (VLSI Technology) (01.06.2015)
Published in 2015 Symposium on VLSI Technology (VLSI Technology) (01.06.2015)
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Journal Article
Scalability of ultra-thin-body and BOX InGaAs MOSFETs on silicon
Czornomaz, L., Daix, N., Kerber, P., Lister, K., Caimi, D., Rossel, C., Sousa, M., Uccelli, E., Fompeyrine, J.
Published in 2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) (01.09.2013)
Published in 2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC) (01.09.2013)
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1.2 nm capacitance equivalent thickness gate stacks on Si-passivated GaAs
El Kazzi, M., Webb, D.J., Czornomaz, L., Rossel, C., Gerl, C., Richter, M., Sousa, M., Caimi, D., Siegwart, H., Fompeyrine, J., Marchiori, C.
Published in Microelectronic engineering (01.07.2011)
Published in Microelectronic engineering (01.07.2011)
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Theoretical and experimental analysis of capacitance and mobility in InGaAs
Bufler, F. M., Frey, M., Erlebach, A., Deshpande, V., Czornomaz, L., Djara, V., O'Connor, E., Caimi, D., Fompeyrine, J.
Published in 2016 74th Annual Device Research Conference (DRC) (01.06.2016)
Published in 2016 74th Annual Device Research Conference (DRC) (01.06.2016)
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Physical characterization of sub-32-nm semiconductor materials and processes using advanced ion beam-based analytical techniques
Hopstaken, M. J. P., Pfeiffer, D., Copel, M., Gordon, M. S., Ando, T., Narayanan, V., Jagannathan, H., Molis, S., Wahl, J. A., Bu, H., Sadana, D. K., Czornomaz, L., Marchiori, C., Fompeyrine, J.
Published in Surface and interface analysis (01.01.2013)
Published in Surface and interface analysis (01.01.2013)
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Conference Proceeding
Thermal stability of ultra-thin InGaAs-on-insulator substrates
Daix, N., Czornomaz, L., Caimi, D., Rossel, C., Sousa, M., Fompeyrine, J.
Published in 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2013)
Published in 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) (01.10.2013)
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Conference Proceeding
Co-integrating high mobility channels for future CMOS, from substrate to circuits
Czornomaz, L., Daix, N., Uccelli, E., Caimi, D., Sousa, M., Rossel, C., Siegwart, H., Marchiori, C., Fompeyrine, J.
Published in 26th International Conference on Indium Phosphide and Related Materials (IPRM) (01.05.2014)
Published in 26th International Conference on Indium Phosphide and Related Materials (IPRM) (01.05.2014)
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Conference Proceeding
High Performance InGaAs Gate-All-Around Nanosheet FET on Si Using Template Assisted Selective Epitaxy
Lee, S., Cheng, C. -W., Sun, X., D'Emic, C., Miyazoe, H., Frank, M. M., Lofaro, M., Bruley, J., Hashemi, P., Ott, J. A., Ando, T., Spratt, W., Cohen, G. M., Lavoie, C., Bruce, R., Patel, J., Schmid, H., Czornomaz, L., Narayanan, V., Mo, R.T., Leobandung, E.
Published in 2018 IEEE International Electron Devices Meeting (IEDM) (01.12.2018)
Published in 2018 IEEE International Electron Devices Meeting (IEDM) (01.12.2018)
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Ultra-Low Power Scaled III-V-on-Si 1T-DRAMs With Quantum Well Heterostructures
Convertino, C., Vergano, L., Czornomaz, L., Zota, C. B., Karg, S.
Published in 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) (01.09.2020)
Published in 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) (01.09.2020)
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III-V-on-CMOS Devices and Circuits: Opportunities in Quantum Infrastructure
Zota, C. B., Morf, T., Muller, P., Convertino, C., Filipp, S., Riess, W., Czornomaz, L.
Published in 2019 IEEE International Electron Devices Meeting (IEDM) (01.12.2019)
Published in 2019 IEEE International Electron Devices Meeting (IEDM) (01.12.2019)
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Conference Proceeding
Sub-Thermionic Scalable III-V Tunnel Field-Effect Transistors Integrated on Si (100)
Convertino, C., Zota, C. B., Baumgartner, Y., Staudinger, P., Sousa, M., Mauthe, S., Caimi, D., Czornomaz, L., Ionescu, A. M., Moselund, K. E.
Published in 2019 IEEE International Electron Devices Meeting (IEDM) (01.12.2019)
Published in 2019 IEEE International Electron Devices Meeting (IEDM) (01.12.2019)
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