Search Results - "Cline, D.W." :: K.UTB vyhledávací portál | TBU Library Retrieval Portal

Modeling Active Microwave Remote Sensing of Snow Using Dense Media Radiative Transfer (DMRT) Theory With Multiple-Scattering Effects

Modeling Active Microwave Remote Sensing of Snow Using Dense Media Radiative Transfer (DMRT) Theory With Multiple-Scattering Effects

by Leung Tsang, Jin Pan, Ding Liang, Zhongxin Li, Cline, D.W., Yunhua Tan
Published in IEEE transactions on geoscience and remote sensing (01.04.2007)

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Journal Article

Airborne Ku-Band Polarimetric Radar Remote Sensing of Terrestrial Snow Cover

Airborne Ku-Band Polarimetric Radar Remote Sensing of Terrestrial Snow Cover

by Yueh, S.H., Dinardo, S.J., Akgiray, A., West, R., Cline, D.W., Elder, K.
Published in IEEE transactions on geoscience and remote sensing (01.10.2009)

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Journal Article

High-Resolution Airborne Polarimetric Microwave Imaging of Snow Cover During the NASA Cold Land Processes Experiment

High-Resolution Airborne Polarimetric Microwave Imaging of Snow Cover During the NASA Cold Land Processes Experiment

by Stankov, B.B., Cline, D.W., Weber, B.L., Gasiewski, A.J., Wick, G.A.
Published in IEEE transactions on geoscience and remote sensing (01.11.2008)

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Journal Article

A CMOS HDSL2 analog front-end

A CMOS HDSL2 analog front-end

by Gattani, A., Cline, D.W., Hurst, P.J., Mosinskis, P.M.
Published in IEEE journal of solid-state circuits (01.12.2000)

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Journal Article

A power optimized 13-b 5 Msamples/s pipelined analog-to-digital converter in 1.2 μm CMOS

A power optimized 13-b 5 Msamples/s pipelined analog-to-digital converter in 1.2 μm CMOS

by Cline, D.W., Gray, P.R.
Published in IEEE journal of solid-state circuits (01.03.1996)

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Journal Article

A power optimized 13-b 5 Msamples/s pipelined analog-to-digital converter in 1.2 /spl mu/m CMOS

A power optimized 13-b 5 Msamples/s pipelined analog-to-digital converter in 1.2 /spl mu/m CMOS

by Cline, D.W., Gray, P.R.
Published in IEEE journal of solid-state circuits (01.03.1996)

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Journal Article

An 8-b 85-MS/s parallel pipeline A/D converter in 1- mu m CMOS

An 8-b 85-MS/s parallel pipeline A/D converter in 1- mu m CMOS

by Conroy, C.S.G., Cline, D.W., Gray, P.R.
Published in IEEE journal of solid-state circuits (01.04.1993)

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Journal Article

Method and apparatus for matching common mode output voltage at a switched-capacitor to continuous-time interface

Method and apparatus for matching common mode output voltage at a switched-capacitor to continuous-time interface

by A. GATTANI,P.J. HURST,D.W. CLINE
Year of Publication 28.02.2007

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Patent

A power optimized 13-bit 5M samples/s pipelined analog to digital converter in 1.2 /spl mu/m CMOS

A power optimized 13-bit 5M samples/s pipelined analog to digital converter in 1.2 /spl mu/m CMOS

by Cline, D.W., Gray, P.R.
Published in Proceedings of the IEEE 1995 Custom Integrated Circuits Conference (1995)

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Conference Proceeding

Method and apparatus for matching common mode output voltage at a switched-capacitor to continuous-time interface

Method and apparatus for matching common mode output voltage at a switched-capacitor to continuous-time interface

by A. GATTANI, P.J. HURST, D.W. CLINE
Year of Publication 23.10.2002

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Patent

A high-speed parallel pipelined ADC technique in CMOS

A high-speed parallel pipelined ADC technique in CMOS

by Conroy, C.S.G., Cline, D.W., Gray, P.R.
Published in 1992 Symposium on VLSI Circuits Digest of Technical Papers (1992)

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Conference Proceeding

Design considerations for low-power, high-speed CMOS analog/digital converters

Design considerations for low-power, high-speed CMOS analog/digital converters

by Cho, T.B., Cline, D.W., Conroy, C.S.G., Gray, P.R.
Published in Proceedings of 1994 IEEE Symposium on Low Power Electronics (1994)

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Conference Proceeding